problem w/ setting polynomial for CRC

I made the magic happen on a STM32G031 to hand..

In ST-Speak inversion means bit-reversal

CRC-32-K 2D3DD0AE TEST 2D3DD0AE ?

//****************************************************************************

void TestCRC(void) // sourcer32@gmail.com PayPal accepted.. gauge by man-hours saved
{
 uint8_t test[] = { 0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39 }; // 0x2D3DD0AE

 /* CRC handler declaration */
 CRC_HandleTypeDef CrcHandle = {0};

 /* CRC Peripheral clock enable */
 __HAL_RCC_CRC_CLK_ENABLE();

 /*##-1- Configure the CRC peripheral #######################################*/
 CrcHandle.Instance = CRC;

 /* The default polynomial is not used. It is required to defined it in CrcHandle.Init.GeneratingPolynomial*/
 CrcHandle.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_DISABLE; // ST double-negative, use user supplied

 /* Set the value of the polynomial */
 CrcHandle.Init.GeneratingPolynomial = 0x741B8CD7; // 32-bit CRC-32-K, bit reversed 0xEB31D82E, hw left shifts, always

 /* The user-defined generating polynomial generates a 32-bit long CRC */
 CrcHandle.Init.CRCLength = CRC_POLYLENGTH_32B;
	
 /* The default init value is not used */
 CrcHandle.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_DISABLE; // ST double-negative

 /* The used-defined initialization value */
 CrcHandle.Init.InitValue = 0xFFFFFFFF; // 32-bit all set

 /* The input data is inverted (bit-reversed) */
 CrcHandle.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE; // Bit swap byte end-to-end

 /* The output data is inverted (bit-reversed)*/
 CrcHandle.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE;// Bit swap word end-to-end

 /* The input data are 8-bit long */
 CrcHandle.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;

 if (HAL_CRC_Init(&CrcHandle) != HAL_OK)
 {
 /* Initialization Error */
 Error_Handler(__FILE__, __LINE__);
 }

 /* Note that I negate the response the hardware spins end-to-end */
 printf("CRC-32-K %08X TEST 2D3DD0AE ?\n", ~HAL_CRC_Calculate(&CrcHandle, (uint32_t *)test, sizeof(test)));
}

//****************************************************************************

Ok, but LFSR's and CRC methods have been a staple of DfT (Design for Test) / BiST (Built in Self Test) for over 4 decades.

I'm not sure of your CRC implementation here, but it's usually a net of feed back terms and flip-flops, gated by a latched polynomial pattern in this case, it should be able to be validated "by-design". Do you test all the other 2^(32-1) patterns for a polynomial that would be ODD? I'd wager serious money you do not, or come remotely close.

The CRC-24 implementation should be able to provide some robust test-patterns / test-vectors that could be applied at the DESIGN stages to exercise the gate level implementation. And prove robustly that the ODD rule is patently nonsense.

For the CRC-32-K I reversed the polynomial to deal with the left-shifting implementation, and that does make it ODD at the LSB.

But in the case of the 15-bit and 24-bit CRC that I've expressly demonstrated here, all the low order bits of the polynomial registers are zero, as I've left aligned them, whilst the CRC-24 itself is in the form x^24 + ... + 1

Pretty sure I can demonstrate 4 and 5-bit exploits of the hardware too.

Need to dig out an STM32G4