2024-04-18 12:27 AM
Hello,
We are using the STM32C0 in a low-power application. We initially selected the part with 12K SRAM in case we needed to use more than 6K, but after development have found that we can make do with 6K. I am curious if there is any power savings by moving to the 6K part. The "Supply Current Characteristics" in the C011 vs C031 data sheets are cut-and-paste identical which leads me to believe that the extra SRAM has no impact on power consumption, in which case we would just stay with the 12K part. However, if the copy/paste was somehow an oversight and we could save some power by switching to the 6K part then we'd consider doing that.
Thanks,
TG
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2024-04-18 01:45 AM
The STM32C0 family is not a particularly ultra-low-power family, so a derivative of the STM32U0 is recommended for corresponding requirements. Otherwise, the power requirements are in fact identical, as you can see from the data sheets.
Hope that helps?
Regards
/Peter
2024-04-18 01:45 AM
The STM32C0 family is not a particularly ultra-low-power family, so a derivative of the STM32U0 is recommended for corresponding requirements. Otherwise, the power requirements are in fact identical, as you can see from the data sheets.
Hope that helps?
Regards
/Peter
2024-04-18 02:08 AM
It is helpful to know that the extra RAM doesn't impact consumption.
The STM32U0 would be ideal, however we are also space-constrained and need to use both the TSSOP-20 package and an HSE because we have to make some short but precise timing measurements. The C0 TSSOP-20 has OSCX pins that multiplex either an HSE or an LSE. The U0 TSSOP-20 seems to only have OSC32 pins and only support LSE. For this particular application we have a requirement not to use a BGA and the only other small U0 package with HSE support is the UFBGA64 one.
If there is some way to get an HSE working with the U0 TSSOP-20 package, then that would be really interesting to know.
Thanks,
TG
2024-04-18 03:09 AM
OK, in this case you could still consider an STM32U0 in UFQFPN48 in 7x7mm. The recommended footprint is 7.3x7.3mm = 53.29mm², while the TSSOP20 occupies an area of 7.1x7.0mm = 49.7mm², so only 3.59mm² more. Too much?
2024-04-18 04:40 AM
If you want/need to stick with TSSOP-20:
Most STM32 devices allow trimming of HSI, so if you have a spare timer and enough flash left, an option might be to use a 32.768 kHz crystal for LSE and trim HSI periodically based on LSE, see AN5857 (that's for C0, the U0 apparently does have provisons for TIM16, too, although the RM mysteriously omits TIM15 and TIM16 altogether).