2015-08-21 10:04 PM
I am using an STM32F407 chip on a custom PCB. Using (mostly) HAL libraries, but I've ended up writing a lot of my code and verifying the registers individually.
I am using an ADC that communicates over SPI. The transfer must be duplex -- each time I receive a sample I am also sending the configuration for the next sample. My application is a high-speed data logger. Right now I have it working so that every time the Timer overflows I configure and start the SPI transfer inside of the timer ISR. Ideally, I would like to set this up so that each time the timer overflows, it triggers the SPI DMA transfer to start for another sample without needing an ISR. Once a buffer is full, trigger an interrupt and handle the data in bulk. I have read RM00090 a couple of times and I can't figure out how to start to approach this one, or if it is even possible..2015-08-22 04:23 AM
Hi soren.eric,
I'd highly recommend you to refer to this about peripherals interconnections on STM32F4 products, an example is presented and described in detail that may help you. -Syrine-2015-10-02 01:18 PM
Hi Syrine,
Thanks for the response. I have reviewed the document and it is helpful. Here is what I think I know: 1. I can setup the Rx and Tx spi transfers on the same channel so that when I trigger a DMA transfer I will get duplex communication (a requirement for this application). For instance, according to UM0090, ''DMA Request Mapping'': I can pick use Channel 3 on an STM32F4xx part. SPI1_RX assigned to Stream 3 and SPI1_TX assigned to Stream 5. This way (if I am thinking of this correctly), when I initiate a transfer on channel 3 I will get full-duplex spi communication. 2. I *think* I can trigger the transfer using a timer, but I am still not sure about which timer can trigger the transfer. Do I need a timer on the same channel (ie: channel 3) to initiate the transfer? My end-goal would be to have a sampling timer that triggers a full-duplex SPI transfer (16 bits) each time the timer updates. In a perfect world, each time one of these transfers occurs the memory address on the receive side is incremented. My goal is to be able to sample at high speeds with much less CPU overhead. Is this possible? (if its possible, I will figure it out..)2015-10-02 01:54 PM
I think you'd want the timer on the same APB as the SPI peripheral, what will drive the DMA/Stream/Channel is the SOURCE of the trigger, and the timer related DMA sources are enumerated in the DMA table/matrix.