Possible error in Cortex-M0 programming manual.

[AA1]

Cortex-M0 programming manual have several instructions like this:

You can use the LSR ...

When the instruction is LSRS, the carry flag is updated ...

But I believe that on Cortex-M0, there is no optional 'S' appended to instructions to update flags. Instructions that update flags, update always. So instruction LSR and LSRS (and others), always update flags.

[KnarfB]

There manuals are more or less copies of the ARM documents. You find the same text here: https://developer.arm.com/documentation/dui0497/a/the-cortex-m0-instruction-set/about-the-instruction-descriptions/shift-operations?lang=en

This has to do with different assembler syntax / instruction sets. For example Joseph Yiu's "Definitive Guide to the ARM Cortex-M0" says:

Instruction LSL

Function Logical Shift Left

Syntax (UAL) LSLS <Rd>, <Rd>, <Rm>

Syntax (Thumb) LSL <Rd>, <Rm>

Note Rd = Rd << Rm, last bit shifted out is copied to APSR.C,

APSR.N and APSR.Z are also updated.

Rd and Rm are low registers.

hth

KnarfB

[AA1]

The problem is not syntax but what in fact the instruction does. As it is in manual, LSR and other instructions, don't update flags in special carry flag. And this is not true for ARM Cortex-M0. Flags including carry, are always updated.

[Tesla DeLorean]

Yes, but the CM0 should typically be understood in the context of it supporting a much smaller subset of instructions. Depending on the Assembler you can use the forms interchangeably, often with a warning/suggestion to use the S form, or that the flags will be effected.

I don't think I'd be using the ST Programming Manual as my primary source for understanding the ARM core, nor assembler.. The PM could likely be handled better, but I'm also not heavily invested.

[AA1]

And I believe that on Cortext-M0, instruction MOV(S) never update flags.

[AA1]

And I believe that on Cortext-M0, instruction MOV(S) never update flags.