2016-01-25 05:26 PM
Hello.
I am looking at the Nucleo F091 pin distribution,https://developer.mbed.org/platforms/ST-Nucleo-F091RC/
and notice SPI1 and SPI2 pins. No problem about SPI2 pins (in fact I have used them successfully) but for SPI1 I can see that there aretwo
sets of pins for it. 1) Is this correct? I mean I see for example SPI1 MOSI is PA_7 and PB_5 .2) Also I wonder which pin is SPI1 CS?? I am thinking PA_4 but then I read it is PB_6 so I am confused...Any help will be greatly appreciated #spi2016-01-25 06:08 PM
There is a pin multiplexer, allowing peripheral signals to enter/exit via a subset of pins.
Check the Datasheet, there should be a pin list for Alternate Functions.The Chip Select pin is often just a GPIO you can drive low/high, as the automated method offered by the peripheral usually doesn't mirror the requirements of the attached device.