2016-08-31 05:08 PM
2016-09-02 09:09 PM
So I had a look with my logic analyzer. After fixing the bug where I was allowing too many DMA transfers per picture (there is 2 pixels per DMA transfer - wasn't do that), I now have similar problems to before.
HS = Horizontal sync. Every line/row of pixels.VS = Vsync. Every entire pictureSTATUS2: DCMI Line interruptSTATUS1: DMA interrupt.First, the 164ms delay seen in the zoomed out picture. I'm enabling DCMI in the DCMI interrupt, and somehow there is a 164ms delay? That would ideally be exactly on the right time.Second, the data doesn't seem to be valid still. I would expect that the results are just a little bit shifted/the picture is distorted. But no, it's just nor working nicely.Any ideas? Any ideas for things that I could check?2016-09-02 11:17 PM
2016-09-03 07:05 PM
Thanks! On first glance, there's only a little different in the DMA setup, and a lot different in synchronisation. I'll have a look.