cancel
Showing results for 
Search instead for 
Did you mean: 

Minimizing STM32H743IIK6 current in sleep mode

ELI_HAIT
Associate II

If the STM32H743IIK6 is clocked by an external 25MHz clock generator, but we still aim for minimum current consumption until a wake-up is required, what is the lowest achievable current draw assuming everything is powered down except for the external oscillator?

 

Thanx,
Eli.

 

1 ACCEPTED SOLUTION

Accepted Solutions

If you can live with lower HCLK then you will almost certainly achieve even lower current consumption although it's not explicitly stated in the data-sheet.

The sleep current will be lower than the run current.

At VOS3, ST quotes the run current as typically 47 mA at 200 MHz, dropping to 12 mA at 25 MHz

The sleep current I see as 16.5 mA at 200 MHz from the data-sheet in table 124 (not sure where the 15.5 mA that @Gyessine quotes came from).

So if the run current is 12 mA, the sleep current must be lower than that where you have HCLK of 25 MHz.

How much lower is hard to know; at these frequencies current is dominated by transistor leakage rather than charging and discharging of stray capacitances. I'll guess standby current would be 10 mA at 25 dec C at 25 MHz HCLK.

View solution in original post

5 REPLIES 5
Gyessine
ST Employee

Hello @ELI_HAIT 
The current consumption depends on the external clock used, voltage scaling (VOS), temperature and hardware used
According to the product Datasheet, for Sleep mode with the regulator on, the STM32H743 current can be as low as 15.5 mA at VOS3 and 200 MHz.
BR
Gyessine

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

If you can live with lower HCLK then you will almost certainly achieve even lower current consumption although it's not explicitly stated in the data-sheet.

The sleep current will be lower than the run current.

At VOS3, ST quotes the run current as typically 47 mA at 200 MHz, dropping to 12 mA at 25 MHz

The sleep current I see as 16.5 mA at 200 MHz from the data-sheet in table 124 (not sure where the 15.5 mA that @Gyessine quotes came from).

So if the run current is 12 mA, the sleep current must be lower than that where you have HCLK of 25 MHz.

How much lower is hard to know; at these frequencies current is dominated by transistor leakage rather than charging and discharging of stray capacitances. I'll guess standby current would be 10 mA at 25 dec C at 25 MHz HCLK.

Pavel A.
Super User

While waiting for a wake-up signal, what amount of state do you need to preserve: whole SRAM? GPIOs? How fast you need to get to the running state? You can totally switch the MCU power off, and make the wake-up signal to power it on. (Then, of course, re-initialize everything except of the backup SRAM etc.).

Hi, everyone, thanx for your answers.

Everything can be shut down, no need for RAM retention, just the IO's outputs should retain their last state and the recovery time isn't important. After the wakeup it will perform software reset.

So what will be the current consumption in case i have to keep the external 25 MHz clock generator running?

 

Regards,
Eli.

Thanx, everybody who answered.

It looks like any case i'll need to add external circuitry to minimize the current in WAIT state.

:)