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Is there a typo for Retriggerable One Pulse Mode in the STM32F7 documentation?

Dennis Ai
Associate II
Posted on March 12, 2018 at 23:35

The

http://www.st.com/content/ccc/resource/technical/document/reference_manual/group0/96/8b/0d/ec/16/22/43/71/DM00224583/files/DM00224583.pdf/jcr:content/translations/en.DM00224583.pdf

for the STM32F7 reads on pg.1017:

OC1M: Output compare 1 mode

1000: Retriggerable OPM mode 1 - In up-counting mode, the channel is active until a trigger

event is detected (on TRGI signal). Then, a comparison is performed as in PWM mode 1

and the channels becomes inactive again at the next update. In down-counting mode, the

channel is inactive until a trigger event is detected (on TRGI signal). Then, a comparison is

performed as in PWM mode 1 and the channels becomes inactive again at the next update.

1001: Retriggerable OPM mode 2 - In up-counting mode, the channel is inactive until a

trigger event is detected (on TRGI signal). Then, a comparison is performed as in PWM

mode 2 and the channels becomes inactive again at the next update. In down-counting

mode, the channel is active until a trigger event is detected (on TRGI signal). Then, a

comparison is performed as in PWM mode 1 and the channels becomes active again at the

next update.

I highlighted the text in bold that might be a typo.  Shouldn't the channel be inactive until a trigger event is detected?  Otherwise, the following sentence where it says '...the channel is inactive again until a trigger event is detected' makes no sense.

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