Interrupts are not getting called in uSDcard project using ARM DS-5

[sunilpatil423]

Posted on April 16, 2012 at 12:47

Hi all,

I am new to working with STM324 microcontrollers. I was running a uSDcard project on STM324 board using Atollic and I did that successfully. Since we have licensed version of ARM DS-5 I was migrating uSDcard project from Atollic to DS-5. I was able to that to certain extent. ARM DS-5 application is loaded in to RAM(unlike Atollic where application uses flash). I have modified scatter file accordingly. I used CMSIS drivers and utilities. I succefully ran small projects like LED lighting and LCD display. But for uSDcard project SDcard ISR were not being called. Just to cross check I tried toggling LEDs based on SysTick_Handler. That is also not working. I verified that the handler is installed by dumping the memory at 0x0000003C and that address does point to the SysTick_Handler. Disassembling SysTick_Handler shows a branch to the function call which I have written in SysTick_Handler, so I think the vector table is properly loaded and contains valid calls. Can anybody help me to fix this? Thank you in advance.

[Tesla DeLorean]

Posted on April 16, 2012 at 16:07

If the handlers are correctly in place, then consider whether you have initialized things correctly. Remember the SysTick is a ''System Handler'' and not an ''Interrupt'', and as such is not handled by the NVIC. The FW library, at least most I'm familiar with, treat the configuration and priority settings differently than an interrupt.

I'd comment on the code, but I see none.

[sunilpatil423]

Posted on April 16, 2012 at 16:57

Ok. I used SysTick just to cross check. My actual problem occurs when I try to open directory system in SDcard project(main.c).

I have attached the code for SDcard interrupt. I think the flag SD_SDIO_DMA_FLAG_TCIF is not getting set.

I have also attached interrupt vector table and my scatter file. Thank you. ________________ Attachments : exceptions.c : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006HtUv&d=%2Fa%2F0X0000000aQr%2FTqaTt6E1euk4HbXvcGwvLBgcj7IINtreFTUPLFg2UV8&asPdf=falsemain.c : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006HtU8&d=%2Fa%2F0X0000000aQf%2F_qLRFaz6aenWDNT7GCJoHGLbhrpdZTIqknHCN3scyqQ&asPdf=falsescatter.****.txt : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006HtV0&d=%2Fa%2F0X0000000aQs%2FBRDO2B6GZx2x3Mr_7hqSIrhCN7ouC4N4lborDAy8Qo0&asPdf=falsesdcard_irq.c : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006HtSC&d=%2Fa%2F0X0000000aQE%2Fbmsk29Dy00dtPT9_qUPZHff9bb8MBbLQYj8D88bLqxQ&asPdf=false

[Tesla DeLorean]

Posted on April 16, 2012 at 18:08

Your vector table looks to be inadequately complete or ordered. You must enumerate all the interrupts in their correct order, you can point them at empty handlers. You don't get to specify the order, you can program the priority/preemption levels within the NVIC.

__Vectors DCD __initial_sp ; Top of Stack
DCD Reset_Handler
DCD NMIException
DCD HardFaultException
DCD MemManageException
DCD BusFaultException
DCD UsageFaultException
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD SVCHandler
DCD DebugMonitor
DCD 0 ; Reserved
DCD PendSVC
DCD SysTickHandler
DCD WWDG_IRQHandler
DCD PVD_IRQHandler
DCD TAMPER_IRQHandler
DCD RTC_IRQHandler
DCD FLASH_IRQHandler
DCD RCC_IRQHandler
DCD EXTI0_IRQHandler
DCD EXTI1_IRQHandler
DCD EXTI2_IRQHandler
DCD EXTI3_IRQHandler
DCD EXTI4_IRQHandler
DCD DMA1_Channel1_IRQHandler
DCD DMA1_Channel2_IRQHandler
DCD DMA1_Channel3_IRQHandler
DCD DMA1_Channel4_IRQHandler
DCD DMA1_Channel5_IRQHandler
DCD DMA1_Channel6_IRQHandler
DCD DMA1_Channel7_IRQHandler
DCD ADC1_2_IRQHandler
DCD USB_HP_CAN_TX_IRQHandler
DCD USB_LP_CAN_RX0_IRQHandler
DCD CAN_RX1_IRQHandler
DCD CAN_SCE_IRQHandler
DCD EXTI9_5_IRQHandler
DCD TIM1_BRK_IRQHandler
DCD TIM1_UP_IRQHandler
DCD TIM1_TRG_COM_IRQHandler
DCD TIM1_CC_IRQHandler
DCD TIM2_IRQHandler
DCD TIM3_IRQHandler
DCD TIM4_IRQHandler
DCD I2C1_EV_IRQHandler
DCD I2C1_ER_IRQHandler
DCD I2C2_EV_IRQHandler
DCD I2C2_ER_IRQHandler
DCD SPI1_IRQHandler
DCD SPI2_IRQHandler
DCD USART1_IRQHandler
DCD USART2_IRQHandler
DCD USART3_IRQHandler
DCD EXTI15_10_IRQHandler
DCD RTCAlarm_IRQHandler
DCD USBWakeUp_IRQHandler
DCD TIM8_BRK_IRQHandler
DCD TIM8_UP_IRQHandler
DCD TIM8_TRG_COM_IRQHandler
DCD TIM8_CC_IRQHandler
DCD ADC3_IRQHandler
DCD FSMC_IRQHandler
DCD SDIO_IRQHandler
DCD TIM5_IRQHandler
DCD SPI3_IRQHandler
DCD UART4_IRQHandler
DCD UART5_IRQHandler
DCD TIM6_IRQHandler
DCD TIM7_IRQHandler
DCD DMA2_Channel1_IRQHandler
DCD DMA2_Channel2_IRQHandler
DCD DMA2_Channel3_IRQHandler
DCD DMA2_Channel4_5_IRQHandler

[sunilpatil423]

Posted on April 17, 2012 at 10:42 The original post was too long to process during our migration. Please click on the provided URL to read the original post. https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I6ay&d=%2Fa%2F0X0000000brM%2Fr.OrmoyeZw9D2uqOz9jKV1cQUcybgegb1MSAadzjf28&asPdf=false

[Tesla DeLorean]

Posted on April 17, 2012 at 16:20

Your other table seem to infer some ordering priority, my point was this is achieved with NVIC settings. You have trimmed all initialization code, so I really have very little information to work with.

You will need to make sure you tell the core that you are placing the vector table in RAM at 0x20000000. The STM32F1 had some odd Boot-from-RAM behaviour, not sure if that is present in the STM32F4.

[sunilpatil423]

Posted on April 18, 2012 at 11:49

clive,

What all should our initialization code should contain? As I told I took working version from Atollic I think initialization code may be proper. to reply to your comment ''You will need to make sure you tell the core that you are placing the vector table in RAM at 0x20000000.'' , I have done that and disassembly showed that vector table is placed properly. I also verified that SysTick_Handler is enabled. Can you please give some information to understand by your comment ''STM32F1 had some odd Boot-from-RAM behaviour''. Thank you !

[Tesla DeLorean]

Posted on April 18, 2012 at 13:52

It works in Atollic from FLASH

  /* Set the Vector Table base location at 0x20000000 */   NVIC_SetVectorTable(0x20000000, 0); The STM32F1 series ignored the reset vector address when jumpered to execute from RAM via the BOOTx pins, different variants (Medium, High, etc) started at addresses 0x1B8 or 0x1E8 or something. Does this effect the F2, I don't know as I don't spend my time booting from RAM, it's just an issues you could spend days debugging if you didn't know the part did odd things.

[sunilpatil423]

Posted on April 20, 2012 at 09:23

I understood your point. FYI, vector table is placed at 0x20000000 and execution starts from reset vector table (Reset_Handler).

I went back to SysTick_Handler case which is not getting called and here are few things I observed regarding SysTick_Handler exception: > SysTick_Handler is placed at correct location in vector table (0x2000003C).  > SysTick_Handler exception is enabled:

NVIC_PriorityGroupConfig

(NVIC_PriorityGroup_3);

NVIC_InitStructure.

NVIC_IRQChannel

=

SysTick_IRQn

;

NVIC_InitStructure.

NVIC_IRQChannelPreemptionPriority

= 0;  NVIC_InitStructure.

NVIC_IRQChannelSubPriority

= 0;

NVIC_InitStructure.

NVIC_IRQChannelCmd

=

ENABLE

;

NVIC_Init

(&NVIC_InitStructure);

>STCSR flag contents are set properly.

>

SysTick counter operation and reloading are happening properly.

>In STCR register SKEW value is 1 (Inexact, does it have anything to do?) >In System_Handler_Priority3 register  PRI_15 which corresponds to SysTick_Handler has the value of 240.

> In ICSR register,   PENDSTSET is always remainig in ''Set_pending'' state.

Do you have any comments on these observations? Thank you.

[Tesla DeLorean]

Posted on April 20, 2012 at 13:49

You don't set the priority that way for a System Handler.

Remember the SysTick is a ''System Handler'' and not an ''Interrupt'', and as such is not handled by the NVIC. The FW library, at least most I'm familiar with, treat the configuration and priority settings differently than an interrupt.

/**
* @brief Configures the SysTick to generate an interrupt each 250 ms.
* @param None
* @retval None
*/
void SysTick_Configuration(void)
{
/* SysTick interrupt each 250 ms */
if (SysTick_Config((SystemCoreClock/8) / 4))
{
/* Capture error */
while (1);
}
/* Select AHB clock(HCLK) divided by 8 as SysTick clock source */
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
/* Set SysTick Preemption Priority to 1 */
NVIC_SetPriority(SysTick_IRQn, 0x04);
}

Why not start with a working example from the FW library for the STM32F4? Presumably the DS-5 stuff will work with Keil examples. That or cut your code down so you can provide a complete example.