Interrupt Problem

[ezrab]

Posted on October 17, 2010 at 11:32

hi i am trying to activate the Tim2 Interrupt but for some reason it does not work here is the program i wrote:

#include ''stm32F10x.h'' void setsystemclock(void); void TIM2_IRQHandler(void); int main(void) {     setsystemclock(); //set system clock to 24Mhz     //rcc configuration    RCC->APB1ENR=RCC_APB1RSTR_TIM2RST;//tim2 enable     RCC->APB2ENR=RCC_APB2ENR_IOPCEN;//portc Clock enable     //nvic configuration      NVIC_EnableIRQ(TIM2_IRQn);      //GPIO configuration      GPIOC->CRL=0x33000000;//ports 6,7 as fast output      GPIOC->CRH=0x33;//ports 8,9 as fast output   //tim Configuration      TIM2->ARR=65535;      TIM2->EGR=TIM_EGR_UG;/*!<Update Generation */      TIM2->CCMR1=0;      TIM2->CCR1=40961;      TIM2->CCER=TIM_CCER_CC1E;  /*!<Capture/Compare 1 output enable */      TIM2->CCMR1=0;      TIM2->DIER=TIM_DIER_CC1IE ;/*!<Capture/Compare 1 interrupt enable */      TIM2->CR1=TIM_CR1_CEN;/*!<Counter enable */     while(1)     {     } } void TIM2_IRQHandler(void) {   TIM2->SR=~TIM_SR_CC1IF; //Clears the TIMx's interrupt pending bits.   GPIOC->ODR^=0xC0; } void setsystemclock(void) {       RCC->CR |= RCC_CR_HSEON;     // Wait until it's ready     while ((RCC->CR & RCC_CR_HSERDY) == 0)         ;     // Select PREDIV1 as PLL source and sett PLL mul to 3 (set bit 0)     // for 8*3 = 24 MHz     RCC->CFGR |= RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL_0;     // Start PLL     RCC->CR |= RCC_CR_PLLON;     // Wait until it's ready     while ((RCC->CR & RCC_CR_PLLRDY) == 0)         ;     // Select PLL as system clock     RCC->CFGR |= RCC_CFGR_SW_PLL;     // Here we can check if PLL is used, and maybe disable HSI     // Disable HSI     RCC->CR &= ~RCC_CR_HSION;     RCC->CFGR|=RCC_CFGR_MCO_2; //sys clock output } what did i do wrong? thanks for your help. i get the following error:   BusFault_Handler: DebugMon_Handler: HardFault_Handler: MemManage_Handler: NMI_Handler<26731 (failed: LoadStrW)>:     0x800018c: 0xe7fe         B.N       BusFault_Handler        ; 0x800018c     0x800018e: 0xffff         DC16      65535                   ; '..'     0x8000190: 0xffffffff     MRC2      p15, #7, pc, c15, c15, #7     0x8000194: 0xffffffff     MRC2      p15, #7, pc, c15, c15, #7     0x8000198: 0xffffffff     MRC2      p15, #7, pc, c15, c15, #7     0x800019c: 0xffffffff     MRC2      p15, #7, pc, c15, c15, #7     0x80001a0: 0xffffffff     MRC2      p15, #7, pc, c15, c15, #7     0x80001a4: 0xffffffff     MRC2      p15, #7, pc, c15, c15, #7

[joa]

Posted on October 18, 2010 at 09:17

Do you use startup_stm32_md_vl.s? (or is it ld_vl as in clive1's example? In the IAR-examples they use md_vl)

If not, you have to set up the interrupt vector yourself. And if you do use it you don't need to set up the system clock, it's done in SystemInit() (in system_stm32f10x.c) Edit: Since the stm32f100RBT6B does have usart3 it must be a md-device. I guess :) Edit2: When I edited the message it went to the bottom. It was a couple of posts above when I first wrote it.

[ezrab]

Posted on October 18, 2010 at 09:29 found the solution :-))) i was missing the startup .s files. can you tell me what sould i correct in the pll please thanks.

[joa]

Posted on October 18, 2010 at 10:03

> can you tell me what sould i correct in the pll please thanks.

If you use the startup-files you don't have to do it yourself. Otherwise you can do as you do now (as I told you in another thread). But that solution relies on the reset values of the RCC-registers. If that bothers you, you can reset the bits before you set them (in the fields with more than one bit). For example:         RCC->CFGR &= ~RCC_CFGR_PLLMULL;  // Reset PLLMULL bits before         RCC->CFGR |= RCC_CFGR_PLLSRC | RCC_CFGR_PLLMULL_0; And you should probably wait for the SWS bits in RCC->CR to be set to 0b10 before you disable HSI. But as I said in the other thread ''it seems to work, but I don't know if it's the correct way to do it'' :-;

[ezrab]

Posted on October 18, 2010 at 11:29 i used the startup_stm32f10x_hd.s file startup_stm32f10x_cl.s startup_stm32f10x_ld.s startup_stm32f10x_md.s i simply added them to the project. but i didnt add the system_stm32f10x.c file so i need to set the system clock myself. by the way how do i define the vector myself can you give me an example to the defenition of TIM2 vector for example. thanks.

[ezrab]

Posted on October 18, 2010 at 11:31 but to the build i add the hd file like in the IAR example.

[joa]

Posted on October 18, 2010 at 12:10

You're supposed to use only one startup file. Which one depends on the device,

cl - connectivity line ld - low density md - medium density hd - high density vl - value line So what is the stm32F100RBT6B? According to the manual:In the rest of the document, the STM32F100x4 and STM32F100x6 are referred to as low-density devices while the STM32F100x8 and STM32F100xB are identified as medium-density devices. So is it x6 or xB that match? My interpretation is that it is a medium density device (since it contain usart3, which isn't supposed to be in low density devices), it's also the value line so it must be startup_stm32f10x_md_vl.s that is the correct file to use. The vector is defined in the startup-file so look in the file, it's the way to do it.

[ezrab]

Posted on October 18, 2010 at 13:09

thanks alot you helped me very much.

[joa]

Posted on October 18, 2010 at 15:35

You're welcome!

By the way. I knew I've read the ld/md-definition somewhere. Now I found it. In the begining of every chapter in the reference manual it saysLow-density value line devices are STM32F100xx microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. Medium-density value line devices are STM32F100xx microcontrollers where the Flashmemory density ranges between 64and 128 Kbytes. :)

[Tesla DeLorean]

Posted on October 18, 2010 at 17:01

By the way. I knew I've read the ld/md-definition somewhere. Now I found it. In the beginning of every chapter in the reference manual it says.

Noted, I'll revisit the GNU/GCC code to address that. The port was slapped together to illustrate that the tools worked. For most purposes the LD is simply a subset of the MD functionality. The Keil projects in the VL firmware have if define correctly, and have an stm32f10x_it.c file for the interrupt handler code (in C), although you can also put the code in the main.c file too as the export from the assembler code is weak.can you tell me what should i correct in the pll please thanks. With regard to the PLL and clocks. You should either define explicitly the initial register values, or make sure you mask out bits when change values that are spread across multiple bits. A lot of the ST routines aren't good for changing clocks (ie calling a second time), and make assumptions about the starting conditions and which clocks are running and which are clocking the system. It is generally good practice to ensure the PLL isn't the source clock before changing the PLL settings, and that the HSI is enabled/running before using it as a temporary source, etc. In terms to the code to enable the PLL and switch to it, the following is preferable     /* Enable PLL */     RCC->CR |= RCC_CR_PLLON;     /* Wait till PLL is ready */     while((RCC->CR & RCC_CR_PLLRDY) == 0)     {     }     /* Select PLL as system clock source */     RCC->CFGR = (RCC->CFGR & ~RCC_CFGR_SW) | RCC_CFGR_SW_PLL;     /* Wait till PLL is used as system clock source */     while ((RCC->CFGR & RCC_CFGR_SWS) != 0x08)     {     }