Initialize STM32f407 Ethernet without using libraries

[Mark Greally]

Posted on September 21, 2017 at 17:03

Hi.

Is there any procedure available that shows the steps involved in initializing the Ethernet. The cube code generated uses libraries like HAL. I would like to do this without using these libraries. Is there a procedure that shows which registers need to be set?

Thanks.

#stm-32

[waclawek.jan]

Posted on September 22, 2017 at 00:09

I know of none.

Youmight be better of starting off the older SPL-based examples rather than Cube. I know the ETH chapter in RM is dreadful but it may pay off to put some effort into reading it, too.

Note, that data are moved around by the built-in scatter-gather DMA, so if you are not already familiar with these the task may become harder.

JW

[waclawek.jan]

Posted on September 22, 2017 at 00:22

You may also want to partition the task.

First, switch on clocks (they are 3 of them) and configure the pins.

Second, learn to talk to PHY through

https://en.wikipedia.org/wiki/Management_Data_Input/Output

. You should be able to get link up/down status from the PHY upon cable connect/disconnect.

Third is to configure the MAC. I don't remember if there's a simple way to see it's up without getting to the DMA, maybe not and then you need to do also the following one in one step.

Fourth is then the DMA and moving the data around.

JW

[Mark Greally]

Posted on September 27, 2017 at 11:23

Thanks for the reply. It is steps 3 and 4 you mention that I am most interested in. I would have thought there would be some documentation provided by STM that would outline how the ip address, mac adresss, port numbers etc are stripped and how they are read and the general workings of the mac core.

:(

[Mark Greally]

Posted on September 28, 2017 at 11:48

Where then can I find the most up to date code that implements a webserver?

[waclawek.jan]

Posted on September 28, 2017 at 12:48

In Cube, I guess...?

Look e.g. into  [STM32Cube_FW_F4_V1.16.0]\Projects\STM324xG_EVAL\Applications\LwIP\

JW

[Mark Greally]

Posted on September 28, 2017 at 14:48

That is a useful looking resource. However I have used the cube to initialise the MC01 (PA8) as external clock to the PHY. My clock is 150MHz and want to divide by 3 to have 50MHz on PA8. The default code is as follows:

/*Configure GPIO pin : PA8 */

GPIO_InitStruct.Pin = GPIO_PIN_8;

GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;

GPIO_InitStruct.Pull = GPIO_NOPULL;

GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;

GPIO_InitStruct.Alternate = GPIO_AF0_MCO;

HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

This gives a frequency of 16MHz and dosn't change even if I change the clock settings. I believe it is not configured correctly so I am wondering is there anything I am missing from the above?

Thanks.

[waclawek.jan]

Posted on September 28, 2017 at 15:03

That's probably HSI. You select the clock output to MCO1 in RCC_CFGR.MCO1 and  the divider in RCC_CFGR.MCO1PRE   - see RM0090 7.3.3  RCC clock configuration register (RCC_CFGR).

JW

[Mark Greally]

Posted on September 28, 2017 at 15:39

I replaced with: 

volatile uint32_t *RCC_CFGR = (volatile uint32_t *)0x40023808U;   // register address

*RCC_CFGR = 0xFD60940A;                                                             // data into register

It works fine now. I thought the cube would be a bit more flexible. Thanks for the pointers, I have plenty to work towards now.

[waclawek.jan]

Posted on September 28, 2017 at 16:12

You probably have already brought in (directly or indirectly) the CMSIS-mandated device headers, in which case you don't need to define registers and you'd simply write

RCC->CFGR = 0xFD60940A;

or even better

RCC->CFGR = 0

| RCC_CFGR_SW_PLL | RCC_CFGR_HPRE_DIV1 | RCC_CFGR_PPRE1_DIV4 | RCC_CFGR_PPRE2_DIV2 | (RCC_CFGR_MCO1__PLL << RCC_CFGR_MCO1_Pos) | (RCC_CFGR_MCOxPRE__3 << RCC_CFGR_MCO1PRE_Pos) | (RCC_CFGR_MCO1__PLL << RCC_CFGR_MCO2_Pos) | (RCC_CFGR_MCOxPRE__5 << RCC_CFGR_MCO2PRE_Pos) ;

I don't like that those constants existing in the header are already shifted into position, but it's better than nothing

https://community.st.com/thread/43418-bitfield-values-in-cmsis-mandated-device-headers

; the rest:

#define RCC_CFGR_MCO1__HSI 0

#define RCC_CFGR_MCO1__LSE 1 #define RCC_CFGR_MCO1__HSE 2 #define RCC_CFGR_MCO1__PLL 3 #define RCC_CFGR_MCO2__SYSCLK 0 #define RCC_CFGR_MCO2__PLLI2S 1 #define RCC_CFGR_MCO2__HSE 2 #define RCC_CFGR_MCO2__PLL 3 #define RCC_CFGR_MCOxPRE__1 0 #define RCC_CFGR_MCOxPRE__2 4 #define RCC_CFGR_MCOxPRE__3 5 #define RCC_CFGR_MCOxPRE__4 6 #define RCC_CFGR_MCOxPRE__5 7

JW