2023-02-04 04:33 PM
2023-02-05 02:17 AM
Read the Reference Manual section on the LPTIM - you will find there all the info you need.
2023-02-05 02:26 AM
Have a look at IRQ self settle source file in this project which takes a snapshot when entering and learing an ISR using a timer, because DBG cycle counter resource is missing in cortex M0+
2023-02-07 08:15 AM
Hi @GErma.1
Indeed, you need to enable continuous mode as referenced in the reference manual and AN4865
The LPTIM output depends on the continuous comparison between the LPTIM counter and the LPTIM_CMP (or LPTIM_CCRx) values.
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Firas
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