HSI and GPS interference

[michele77]

Posted on June 28, 2012 at 01:33

Hello everyone,

Did anyone notice that STM32 with an internal HSI at 8MHz cannot be used in proximity to an embedded GPS antenna? The 8MHz internal oscillator happens to have the 197th harmonic close to L1 and interferes with the GPS antenna element. Am I correct guessing that adding the following code

/* MICHELE: Disable noisy 8MHz internal oscillator */
RCC->CR &= ~RCC_CR_HSION;

in system_stm32f10x.cafter

/* Wait till PLL is used as system clock source */
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08)
{
}

should improve? Best regards, Michele #hsi-gps

[Tesla DeLorean]

Posted on June 28, 2012 at 02:45

Well it's almost certainly not noise up at 1575.42 MHz, far more likely to be noise down at ~4MHz or wherever your GPS receivers final IF is at, or jamming noise around 1.023 MHz +/- 3 KHz

The PLL feeds with HSI/2 You might want to pay particular attention to your power planes, and that you have adequate bulk, and decoupling at the supply pins. Check you don't having any clocking GPIOs running close to the antenna, or have CMOS switching currents flowing under/around the antenna. The STM32's don't inherently have problems with GPS or Cellular interference or jamming. GPS is however very easy to jam.

[michele77]

Posted on June 28, 2012 at 16:42

Hello Clive1,

Thanks for the suggestion, as always very precise and wise. I still have reasons to think it's a harmonic though.. first because the antenna is almost a short at IF frequency, and second because as you saidGPS signals easy to jam. Being GPS signals below the noise floor, even a -80dBm CW at the antenna it's going to be a lot higher than them. And if the antenna is very close to switching logic I think there might well be that kind of power feeding through the element. Another reason to blame noise at 1.57542GHz is that the receiver is always mounted on the board very close to the STM32, but it works very well (showing strong SNRs) if the antenna element is far away (with a longer cable). The fact that the PLL is fed with HSI/2 does not move away that nasty harmonic.. so I am wondering if it is possible to switch HSI off completely and rely on a HSE with a more friendly frequency for GPS. Also, when using a 16MHz oscillator, I wonder if it is possible to do

/* PLL configuration: PLLCLK = (HSE) * 3 = 48 MHz */
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL3);

instead of

/* PLL configuration: PLLCLK = (HSE / 2) * 6 = 48 MHz */
RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL6);

or a 16MHz PFD is too high for the loop filter.. Best wishes, Michele P.S.:Please also let me take this opportunity for thanking you for the invaluable help you always provide with STM

[Tesla DeLorean]

Posted on June 28, 2012 at 18:02

You can definitely turn off HSI, disabling it once you have HSE/PLL running and selected also seems fine. The HSI/2 input to the PLL presumably due to some asymmetrical duty cycle.

I haven't found a good cite for the PLL, the one in the F2 and F4 wants the comparison frequency in the 1-2 MHz range. My gut suggests the one in the F1 wants something in the 4-8 MHz range, it may well function just fine at 16 MHz. You might want to look at how the RF front end of the GPS works (based on chipset or other info). Is it a single down, or double down converter, does it have an LNA, etc. where are the IF (final probably 4-5 MHz), what is the sample rate (16-20 MHz). Local Gold Code equivalents are particularly problematic (ie other GPS receivers). On other parts seen clocking GPIO pins jam on-board antenna, someone forgot to disable pin. Dropping the drive/slew rate might help if appropriate, ie GPIO_Speed_2MHz