How to use external SDRAM as dynamic data memory in M4 core in STM32H747I-DISCO board?
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‎2023-12-28 5:36 AM
Hi community,
I am using STM32H747I-DISCO board and I configured external SDRAM as dynamic data memory in M7 core by calling the SystemInit_ExtMemCtl() function in SystemInit() function, it is working fine but when I tried with the M4 SystemInit_ExtMemCtl() function call is only defined for M7 core in SystemInit() function. Please someone suggest is it possible to use external SDRAM as dynamic data memory in M4 core?
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‎2024-01-23 9:42 AM
Hello,
Yes, indeed you can. Enable DATA_IN_ExtSDRAM flag to activate the SDRAM config section in system_stm32h7xx.c
and you need to edit your linker file to let the SDRAM the location of code execution.
You can inspire from the AN4891 "STM32H72x, STM32H73x, and single-core STM32H74x/75x system architecture and performance" / x-cube-perf-h7
See the configuration "10 - D1_SDRAM_Swapped - D1_DTCM" in the project: code execution from SDRAM and data located in DTCM.
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‎2023-12-28 5:59 AM
Both cores can use the SDRAM once it is initialized. If you want initialization to be done on the M4 core, assign it to that core within CubeMX.
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‎2023-12-28 9:16 PM
I tried with this method its working fine. But I want to use external SDRAM as program data memory for M4, I tried for M7 core to use as program data memory by initializing the SDRAM in SystemInit() function. But for M4 core it is not working. Is it possible to use external SDRAM as program data memory for M4 core?
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‎2023-12-29 6:43 AM
> Is it possible to use external SDRAM as program data memory for M4 core?
Yes, it's possible.
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‎2023-12-29 8:46 PM
Please suggest any example or how to use external SDRAM as program data memory in M4 core
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‎2023-12-30 6:49 AM
Here is an example code using SDRAM on that board:
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‎2024-01-23 9:42 AM
Hello,
Yes, indeed you can. Enable DATA_IN_ExtSDRAM flag to activate the SDRAM config section in system_stm32h7xx.c
and you need to edit your linker file to let the SDRAM the location of code execution.
You can inspire from the AN4891 "STM32H72x, STM32H73x, and single-core STM32H74x/75x system architecture and performance" / x-cube-perf-h7
See the configuration "10 - D1_SDRAM_Swapped - D1_DTCM" in the project: code execution from SDRAM and data located in DTCM.
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‎2024-01-23 1:17 PM - edited ‎2024-01-24 9:27 AM
But WHY?
This is going to be memory with the highest latency, slowest access, and is not cached as the M4 has no model for that.
Where possible use SRAM, ideally the stuff situated closest to the core that's going to be using it.
Up vote any posts that you find helpful, it shows what's working..
