2008-05-26 08:34 AM
How to remap PD0/PD1 for STM32101C8 ?
2011-05-17 03:35 AM
Pls give a correct example, I can't post my code.
[ This message was edited by: anran99 on 14-05-2008 07:07 ]2011-05-17 03:35 AM
I suppose that you want to remap the CAN on the GPIO D0/D1
//CAN Remappper sur D0 et D1 GPIO_PinRemapConfig(GPIO_Remap2_CAN, ENABLE); /* Configure CAN pin: RX */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; GPIO_Init(GPIOD, &GPIO_InitStructure); /* Configure CAN pin: TX */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; GPIO_Init(GPIOD, &GPIO_InitStructure); [ This message was edited by: julien.massot on 14-05-2008 14:28 ]2011-05-17 03:35 AM
thx, but It's STM32101C8 . PD0/PD1 remap on OSC_IN and OSC_OUT pin.
I can't set the PD0/PD1 as output mode ! Maybe this is a bug ,I couldn't resolved it . I need a demo sourcecode to remap . appreciate your help .:D2011-05-17 03:35 AM
my test code :
/**********************************************************************/ void RCC_Configuration(void) { /* RCC system reset(for debug purpose) */ RCC_DeInit(); /* Enable Prefetch Buffer */ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); /* Flash 2 wait state */ FLASH_SetLatency(FLASH_Latency_2); /* HCLK = SYSCLK */ RCC_HCLKConfig(RCC_SYSCLK_Div1); /* PCLK2 = HCLK */ RCC_PCLK2Config(RCC_HCLK_Div1); /* PCLK1 = HCLK/2 */ RCC_PCLK1Config(RCC_HCLK_Div2); /* PLLCLK = 8MHz * 9 = 72 MHz */ RCC_PLLConfig(RCC_PLLSource_HSI_Div2, RCC_PLLMul_12); /* Enable PLL */ RCC_PLLCmd(ENABLE); /* Wait till PLL is ready */ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) { } /* Select PLL as system clock source */ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* Wait till PLL is used as system clock source */ while(RCC_GetSYSCLKSource() != 0x08) { } } } int main() { /* Configure the system clocks */ RCC_Configuration(); /* NVIC Configuration */ NVIC_Configuration(); /* Enable SWJ , Disable JTAG */ GPIO_PinRemapConfig( GPIO_Remap_SWJ_JTAGDisable , ENABLE ); /* AFIO Periperal Clock Enable */ RCC_APB2PeriphClockCmd( RCC_APB2Periph_AFIO,ENABLE ); /* Enable GPIO clock */ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD, ENABLE); GPIO_PinRemapConfig( GPIO_Remap_PD01 , ENABLE ); /* Configure PD.0, PD.1 as Output push-pull */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 ; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; GPIO_Init(GPIOD, &GPIO_InitStructure); // while (1) // { // GPIO_SetBits(GPIOD, GPIO_Pin_0 | GPIO_Pin_1 ); // GPIO_ResetBits(GPIOD, GPIO_Pin_0 | GPIO_Pin_1 ); // GPIO_SetBits(GPIOD, GPIO_Pin_0 | GPIO_Pin_1 ); // GPIO_ResetBits(GPIOD, GPIO_Pin_0 | GPIO_Pin_1 ); // GPIO_SetBits(GPIOD, GPIO_Pin_0 | GPIO_Pin_1 ); // GPIO_ResetBits(GPIOD, GPIO_Pin_0 | GPIO_Pin_1 ); // } }2011-05-17 03:35 AM
Hi - am awaiting new board run - perhaps this suggestion may help:
Can't find obvious error in your listing. Would like you to move this code to two other ''shared pins'' - and see IF the inability to set as output persists. In this manner you - at least - will see if the problem is PD0/PD1 specific. Again - you must comb your part's pin-outs to find suitable (those which aren't ''natually'' I/O) pins to ''re-map.''2011-05-17 03:35 AM
Hi,
Check our last documents on web RM0008 version 4 and Erratasheet version 3 ( May 2008) Let me know if you get more questions on this. Cheers, STOne-32.