How to quit a gap between 2 synchronized PWM?

[Dani Prieto]

Hello everyone!

I have 2 fixed PWM of 40kHz (TIM1_CH1, TIM1_CH1N) and one modulation at 80 kHz fitted into the others, matching the steps by zero.

Instead of this, I have this signals:

There is a gap between them of 1us.

This is the timers declaration:

 void TIM1_3config(void){
	 
	TIM_OCInitTypeDef  TIM_OCInitStructure;
	TIM_BDTRInitTypeDef TIM_BDTRInitStructure;
	NVIC_InitTypeDef NVIC_InitStructure; 
	   // Enable the TIM1 Interrupt 
  NVIC_InitStructure.NVIC_IRQChannel = TIM1_UP_IRQn;
  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; //menos prioritat que TIM1(PWM)
  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  NVIC_Init(&NVIC_InitStructure); 
	 
	NVIC_InitStructure.NVIC_IRQChannel = TIM3_IRQn;
  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 2; //menos prioritat que TIM1(PWM)
  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  NVIC_Init(&NVIC_InitStructure); 
	 
	NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn;
  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //menos prioritat que TIM1(PWM)
  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  NVIC_Init(&NVIC_InitStructure); 	
	
	RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE); //RCC_APB1Periph_TIM2
	RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE); 
	RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE); 
	 
 
   /* Timers synchronisation in parallel mode ----------------------------
 
 
	1/TIM2 is configured as Master Timer:
     - PWM Mode is used
     - The TIM2 Update event is used as Trigger Output  
     2/TIM1 and TIM3 are slaves for TIM2,
     - PWM Mode is used
     - The ITR1(TIM2) is used as input trigger for both slaves
     - Gated mode is used, so starts and stops of slaves counters
      are controlled by the Master trigger output signal(update event).
 
TIM3//base de temps 
PB0		PWM			out P.P.  		80kHz 	TIM3_CH3
PA8		40KD		out P.P.  		40kHz 	tim1_ch1			 --always on
PB13	40KI		out P.P. 			40kHz   tim1_ch1n      --always on
  -------------------------------------------------------------------- */
		GPIOA->CRH = (GPIOA->CRH & 0xFFFFFFF0 | 0x0000000B); //PA8	40KD
		GPIOB->CRH = (GPIOB->CRH & 0xFF0FFFFF | 0x00B00000); //PB13 40KI
		GPIOB->CRL = (GPIOB->CRL & 0xFFFFFFF0 | 0x0000000B); //PB0 	PWM	
 
 
	
	TIM_TimeBaseStructure.TIM_Prescaler = 0x00;   
  TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;     
  TIM_TimeBaseStructure.TIM_Period = 900;  //  master 
  
  TIM_TimeBaseStructure.TIM_ClockDivision = 0x0;    
 
	TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);// - Aquest treballa de master
 
	TIM_TimeBaseStructure.TIM_Prescaler = 0x00;   
  TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;     
  TIM_TimeBaseStructure.TIM_Period = 1;  //40kHz == 80kHz/2    1800--40kHz    40KD 40KI
  TIM_TimeBaseStructure.TIM_ClockDivision = 0x0;    
 
	TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);
 
	TIM_TimeBaseStructure.TIM_Period = 900;  
  TIM_TimeBaseInit(TIM3, &TIM_TimeBaseStructure); //SLAVE PWM 80kHz
 
  /* Master Configuration in PWM1 Mode */
  TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;   //off direct
  TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
  TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;   
  TIM_OCInitStructure.TIM_Pulse = 1;
	TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; //
  TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;			//TIM1_OCNPolarity_High;         
  TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
  TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset; 
  
  TIM_OC1Init(TIM1, &TIM_OCInitStructure); 
  	
	TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;   //off direct	
  TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Disable;
  TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;   
	TIM_OCInitStructure.TIM_Pulse = 450; //duty cycle del PWM al 50%
	TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High; //
  TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_Low;			//TIM1_OCNPolarity_High;         
  TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
  TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCIdleState_Reset; 
  
	TIM_OC3Init(TIM3, &TIM_OCInitStructure); 	
	
  /* Select the Master Slave Mode */
  TIM_SelectMasterSlaveMode(TIM2, TIM_MasterSlaveMode_Enable); 
	
  /* Master Mode selection */
  TIM_SelectOutputTrigger(TIM2, TIM_TRGOSource_Update); 
	//TIM_SelectOutputTrigger(TIM3, TIM_TRGOSource_Enable); 
	
  /* Slave Mode selection:  */
		TIM_SelectSlaveMode(TIM3, TIM_SlaveMode_Trigger);
		TIM_SelectInputTrigger(TIM3, TIM_TS_ITR1); //TIM_TS_ITR1= TIM2
	
		
		TIM_SelectSlaveMode(TIM1, TIM_SlaveMode_Gated);
		TIM_SelectInputTrigger(TIM1, TIM_TS_ITR1); //=TIM2
	
		// TIM_SetCounter(TIM1, 0);  
		// TIM_SetCounter(TIM3, 1100); 
	
 // Initialize Timer 2 to 0xE7 by writing ‘0xE7’ in the timer 2 counter (TIM2_CNTL).
	//TIM_ITConfig(TIM2, TIM_IT_CC1, ENABLE ); //habilitar interrupció de tim2 (33us), per limit Ipri
  	
		TIM_Cmd(TIM1, ENABLE);
		TIM_Cmd(TIM3, ENABLE);
		TIM_CtrlPWMOutputs(TIM1, ENABLE);	
		TIM_CtrlPWMOutputs(TIM3, ENABLE);
		//TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE );
		TIM_Cmd(TIM2, ENABLE);
	//	TIM_ITConfig(TIM3, TIM_IT_Update, ENABLE);	
	
 }

Any sugestion?

Thanks in advance.

[waclawek.jan · Accepted solution]

What do we see on that oscilloscope screenshot?

> TIM_SelectSlaveMode(TIM3, TIM_SlaveMode_Trigger);

> [...]

> TIM_Cmd(TIM3, ENABLE);

No! The point of trigger slave mode is, that the master will enable the slave through the trigger, so you must not enable it manually.

JW

[Dani Prieto]

That's it!

I have commented TIM_CMD of timer3 and it's working OK now 🙂

The red signal was 40KD(40kHz signal) and the yellow one was PWM of 80kHz.

Thank you for your answer!