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How to configure Multiple channel ADC using DMA

ANNU CHERIAN
Associate II

Hi,

I am using stm32f051r4 for my project . I want to configure multiple channel ADC using DMA and my configurations are as follows .

void adc_configuration()

{

RCC->AHBENR |= RCC_AHBENR_GPIOCEN;          // Enable clock for used IO pins

GPIOC->MODER |= BIT(9) | BIT(8);            // Analog mode

GPIOA->MODER |= BIT(15) | BIT(14);  

ADC1->CR &= ~ADC_CR_ADEN;

RCC->APB2ENR |= RCC_APB2ENR_ADCEN;   //Select a clock source for the ADC

    RCC->CR2 |= RCC_CR2_HSI14ON;

while(!(RCC->CR2 & RCC_CR2_HSI14RDY));

ADC1->CFGR2 |= ADC_CFGR2_CKMODE_0;           // Asynchronous clock mode

ADC1->CFGR1 |= ADC_CFGR1_CONT;

ADC1->CFGR1 |= 0x00000000;

ADC1->CFGR1 |= ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG |ADC_CFGR1_DMAEN;

ADC1->CFGR1 &= ~(ADC_CFGR1_ALIGN); // Right alignment, Upward scan

 ADC1->SMPR &= ~ADC_SMPR_SMP;              // 1.5 ADC clock cycles

ADC1->CHSELR |= ADC_CHSELR_CHSEL14|ADC_CHSELR_CHSEL7;         

ADC1->IER |= ADC_IER_EOSEQIE ;

ADC1->ISR |= ADC_ISR_EOSEQ;

ADC1->CR |= ADC_CR_ADEN;

//while(!(ADC1->ISR & ADC_ISR_ADRDY));

//NVIC_EnableIRQ(ADC1_COMP_IRQn);

}

void DMA_config()

{

RCC->AHBENR |= RCC_AHBENR_DMA1EN; 

ADC1->CFGR1 |= ADC_CFGR1_DMAEN; 

DMA1_Channel1->CPAR = (uint32_t) (&(ADC1->DR)); 

DMA1_Channel1->CMAR = (uint32_t)(ADC_array); 

DMA1_Channel1->CNDTR = 3; 

DMA1_Channel1->CCR |= DMA_CCR_MINC | DMA_CCR_MSIZE_0 | DMA_CCR_PSIZE_0 | DMA_CCR_TEIE | DMA_CCR_TCIE ;

DMA1_Channel1->CCR |= DMA_CCR_EN; 

NVIC_EnableIRQ(DMA1_Channel1_IRQn); 

NVIC_SetPriority(DMA1_Channel1_IRQn,0); 

}

As I am new to DMA, I want to know whether these configurations are correct or not and how to obtain the ADC multiple channel conversion results . I have tried to enable both the DMA and ADC interrupts randomly , but while debuging it doesn't enter both the ISR . How can I resolve these issues . Any help would be greatly appreciated.@Community member​ 

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