How to calculate supported external SRAM size for STM32L Microcontroller ?

[Pratik Panchal]

Posted on July 10, 2018 at 15:55

♯

#stm32-l4 #sram

[Tesla DeLorean]

Posted on July 10, 2018 at 17:00

Determine if you are going to use an 8-bit or 16-bit data bus, and then look at how many address bit you're using

[Pratik Panchal]

Posted on July 11, 2018 at 11:41

Thanks for a quick response here.

as per this memory mapping diagram below is to consider maximum SRAM calculation.

For FMC Bank 3 

0x1000 0000 address available

AddressLine is 16 bit

Dataline is 16bit

Now how I can calculate total supportable SRAM?

[Tesla DeLorean]

Posted on July 11, 2018 at 17:30

Depending on the bank you're looking at 64MB or 256MB, probably more than you can afford to implement externally.

It's is likely to also be constrained by the pins available on the specific device you're using, and you don't specify that.

You also don't really specify what you're attempting to achieve in your design, and that's going to drive appropriate chip choices.

[Pratik Panchal]

Posted on July 13, 2018 at 16:49

I am going to use STM32L476VGT6 Controller, Now I need to calculate how much external SRAM memory can be interfaced with

STM32L476VGT6

.

I am going to use 16 data lines.

0x10000000 address available and data bits is 16.

For memory calculation

= 0x10000000  x 16  (0x10000000 converted to decimal)

= 268435456 x 16 

= 4294967296 bits

= 4194304 Kbits

= 512 MBytes 

So we can add up to 512MB SRAM external to

STM32L476VGT6.

Please Correct me if something wrong calculation is done.

[Tesla DeLorean]

Posted on July 13, 2018 at 17:42

As I said before the banks are 64MB and 256MB wide. With the right techniques I could interface 10's of GB, or more, RAM to the L4 part.

Ok, but people don't put that much SRAM externally because it's the most expensive way to do it. I'm thinking you're cheap, or tightly budget constrained.

Why do you need a shed load of SRAM for this application?

Would SDRAM be a more appropriate technology?

Does the L4/L4+ support SDRAM?

Does the L4+ support HyperRAM?

I think the STM32L4R9I-DISCO demos to Octo-SPI

https://st-onlinetraining.s3.amazonaws.com/STM32L4Plus-Peripheral-OctoSPI%20interface%20%28OCTOSPI%29/index.html

 

https://www.st.com/content/ccc/resource/technical/document/application_note/group0/91/dd/af/52/e1/d3/48/8e/DM00407776/files/DM00407776.pdf/jcr:content/translations/en.DM00407776.pdf