Help with porting FMC from STM32L4 app to STM32U5
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‎2022-03-16 7:37 AM
Hi, I'm trying to port my code that uses the FMC to interface a LCD display. The provided configuration works on the STM32L476, but when I port it to the STM32U585 the image is offseted to the right on the display.
Main clock (and FMC clock so) are configured to the same frequency.
Can you help me finding what is the source of the problem ?
L4 code:
FMC_Handle.Instance = FMC_NORSRAM_DEVICE;
FMC_Handle.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
// FMC_Handle.Init
FMC_Handle.Init.NSBank = FMC_NORSRAM_BANK1;
FMC_Handle.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
FMC_Handle.Init.MemoryType = FMC_MEMORY_TYPE_SRAM;
FMC_Handle.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_8;
FMC_Handle.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
FMC_Handle.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
FMC_Handle.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
FMC_Handle.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
FMC_Handle.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
FMC_Handle.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
FMC_Handle.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
FMC_Handle.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
FMC_Handle.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;
FMC_Handle.Init.WriteFifo = FMC_WRITE_FIFO_ENABLE;
FMC_Handle.Init.PageSize = FMC_PAGE_SIZE_NONE;
// Timing
FMC_NORSRAM_TimingTypeDef FMC_Timing = {0};
FMC_Timing.AddressSetupTime = 6;
FMC_Timing.AddressHoldTime = 1;
FMC_Timing.DataSetupTime = 15;
FMC_Timing.BusTurnAroundDuration = 0;
FMC_Timing.CLKDivision = 2;
FMC_Timing.DataLatency = 3;
FMC_Timing.AccessMode = FMC_ACCESS_MODE_A;
if (HAL_SRAM_Init(&FMC_Handle, &FMC_Timing, NULL) != HAL_OK)
{
display_driver_active = FALSE;
return;
}
U5 code:
FMC_Handle.Instance = FMC_NORSRAM_DEVICE;
FMC_Handle.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
// FMC_Handle.Init
FMC_Handle.Init.NSBank = FMC_NORSRAM_BANK1;
FMC_Handle.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
FMC_Handle.Init.MemoryType = FMC_MEMORY_TYPE_SRAM;
FMC_Handle.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_8;
FMC_Handle.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
FMC_Handle.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
FMC_Handle.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
FMC_Handle.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
FMC_Handle.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
FMC_Handle.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
FMC_Handle.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
FMC_Handle.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
FMC_Handle.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY;
FMC_Handle.Init.WriteFifo = FMC_WRITE_FIFO_ENABLE;
FMC_Handle.Init.NBLSetupTime = 0;
FMC_Handle.Init.PageSize = FMC_PAGE_SIZE_NONE;
FMC_Handle.Init.MaxChipSelectPulse = DISABLE;
// Timing
FMC_NORSRAM_TimingTypeDef FMC_Timing = {0};
FMC_Timing.AddressSetupTime = 6;
FMC_Timing.AddressHoldTime = 1;
FMC_Timing.DataSetupTime = 15;
FMC_Timing.DataHoldTime = 0;
FMC_Timing.BusTurnAroundDuration = 0;
FMC_Timing.CLKDivision = 2;
FMC_Timing.DataLatency = 3;
FMC_Timing.AccessMode = FMC_ACCESS_MODE_A;
if (HAL_SRAM_Init(&FMC_Handle, &FMC_Timing, NULL) != HAL_OK)
{
display_driver_active = FALSE;
return;
}
Solved! Go to Solution.
- Labels:
-
FMC-FSMC
-
STM32U5 series
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‎2022-03-16 9:13 AM
Check pinning
Check schematics
Check expectations of display, and why shift might be occurring
Perhaps stick a scope on the interface, and be sure the clocks, and dividers are consistent with expectations, and that timing is in fact correct.
Try write and read back of display side registers, and memory buffers
If you continue to struggle perhaps hook up a logic analyzers to more clearly define the problem/issue faced.
Up vote any posts that you find helpful, it shows what's working..
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‎2022-03-16 9:13 AM
Check pinning
Check schematics
Check expectations of display, and why shift might be occurring
Perhaps stick a scope on the interface, and be sure the clocks, and dividers are consistent with expectations, and that timing is in fact correct.
Try write and read back of display side registers, and memory buffers
If you continue to struggle perhaps hook up a logic analyzers to more clearly define the problem/issue faced.
Up vote any posts that you find helpful, it shows what's working..
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‎2022-03-17 1:03 AM
The problem was not linked to the FMC, it was an interrupts that was not linked to the right EXTI... Thank you for your advices anyway ;)
