Hello. Should I be concerned about D-cache cleaning and invalidation in DMA functions on STM32H573? I am looking at the bus architecture and I see that DCACHE is connected only to OCTSPI and FMC unlike H7.

baranovus · ‎2023-05-16

Foued_KH · ‎2023-05-22

Hello @baranovus ,

Yes,your understand is correct.

Foued

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Foued_KH · ‎2023-05-22

Hello @baranovus ,

Yes,your understand is correct.

Foued

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.