>>What would be the cause?
Accesses to undefined addresses, via pointers, etc.
Misaligned data accesses, unaligned structures, or pointers
>>What measures should be taken to resolve it?
Have a Hard Fault Handler that outputs actionable diagnostic information that the CPU provides.
Look at the faulting code, and registers.
Entirely random, look at what interrupts are doing, if stack is adequate, or buffers are corrupted.
Perhaps look at flash wait states, powering issues.
DEBUG THE PROBLEM
ARM has Technical Reference Manuals for the core, ST has "Programming Manuals" covering similar material. Joseph Yiu has several books from an alternative perspective.
