Hi guys,
first of all, after many hours of study of this peripheral i have "few" points. I will try to be as nice and calm as actually possible.
1: Does anyone in ST review documentation and code you are generating? RM0456 17.4.2 paragraph 2:
"After enabling/starting a GPDMA channel transfer by writing 1 in GPDMA_CxCR.EN, a
GPDMA channel interrupt on a complete transfer notifies the software that the GPDMA
channel is back in idle state (EN is then deasserted by hardware) and that the channel is
ready to be reconfigured then enabled again."
What does it mean? Do i have to start GPDMA channel and then configure it? (Nonsens) Shall be channel configured before it? (obviously) Transfer Complete interrupt is triggered right after enabling/starting channel? Do i have to somehow filter it? LEARN HOW TO WRITE DOCUMENTATION!
2: How the hell shall be ports used? You recommend to use Port1 for memory access and Port0 for peripheral acces (in case the periph-memory transfer is used), but when you generate something from CubeMX, the linked list port use Port0! LEARN HOW TO WRITE DOCUMENTATION!
3: What the hell is block and burst requests. What is difference between linked item and block? What is difference between block, repetitive block, linked list and single/burst transfers? Is repetitive block 2D? LEARN HOW TO WRITE DOCUMENTATION!
4: What is "low-significant bits"??? You meant Least-significant bits?! Who have you hired? Who let you write documentation? Who did a review of it?
I will update this thread with those nonsenses.
