2025-10-15 11:45 PM - edited 2025-10-16 3:08 AM
I'm using STM32H743IIT6 with REV_ID=2003. Quadspi dual-flash indirect read mode is used for continuous reading data from external. According to RM0433, If QUADSPI_DLR = 0xFFFF_FFFF and FSIZE = 0x1F (max value indicating a 4-Gbyte flash memory), then in this special case, transfers continue indefinitely.
But I noticed that after the 1st 4GB is transferred, the frequency of QUADSPI CLK pin dropped to it half value, for example from 80MHz to 40MHz, without any error indicator. After that, the 2nd, 3rd and so on, 4GB transfer will remain 40MHz clock operation continuously.
I read configuration registers of PRESCALER in QUADSPI_CR and other clock configuration registers after clock frequency dropped, they are not be changed.
Our congfiguration of QUADSPI is list below:
CR = 0x1010f45
DCR = 0x1f0000
SR = 0x1a24
FCR = 0x0000
DLR = 0xffffffff
CCR = 0x96100000
AR = 0x0000
ABR = 0x0000
DR = 0x0000
PSMKR = 0x0000
PSMAR = 0x0000
PIR = 0x0000
LPTR = 0x0000
I also tried single-flash mode, the clock is stopped after 1st 4GB is transferred, just like the below thread :
QuadSPI hangs with BUSY after 4 GB indirect read - STMicroelectronics Community
after clock is stopped, the QUADSPI_SR=0x0022, means FIFO is empty but busy=1.