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FPU context saving. How to set FPCA without automatic FPU register stacking

bradleybare
Associate II

‎2016-10-13 08:56 AM

Posted on October 13, 2016 at 17:56

Hello,

I am writing my own context switcher for tasking on the STM32F767ZI. This is a Cortex-M7. In the arm Generic user guide in the FPU section, it talks about allowing the processor to set Control.FPCA bit if I set the bit ASPEN in the FPCCR register. However, I do not want to enable Automatic State Preservation(ASPEN). I would rather write my own logic to check the FPCA bit. But if I do not enable ASPEN then the FPCA bit is never set.

I can successfully save and reload the FPU context during every context switch. But I would like to only save the FPU registers if it is needed. For this I need the FPCA bit to be set or reset. If I enable the ASPEN bit I get a Hard fault. I believe this is because the state is being saved to FPCAR register address instead of the current process stack. Same happens if I set ASPEN and LSPEN. 

So my question is, is there anyway to set the FPCA bit when floating point instructions are used besides the ASPEN bit? Or do I need to somehow set the bit myself in the C program?

Thank you for looking!
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bradleybare
Associate II

‎2016-10-13 09:38 AM

Posted on October 13, 2016 at 18:38

I tried to set the floating point context save address (FPCAR) to more than 128 bytes below my stack and I am still having issues.

I get a hard fault if I set ASPEN, try to use a float, and then context switch.

Does anyone have experience using FPCA in the control register?
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AVI-crak
Senior

‎2016-10-14 03:42 PM

Posted on October 15, 2016 at 00:42

The number of floating point registers for M7 - twice more than the M4. Forced full preservation provides a tangible delay in entering the interrupt.

In this made the original engineers st - floating point is not saved, but to save space is allocated. First, the user's instruction manual to save in the region of the stack - launches a hidden copy mechanism younger registers floating point. They are recorded automatically, even without explicit instructions on the dedicated place for them. The general order is obtained as follows: 

/* STACK_Fx -96,-92,-88,-84,-80,-76,-72,-68,-64, -4, 0, 4, 8, 12, 16, 20, 24, 28, 32,~ 96, 100, 104 */
/* r4, r5, r6, r7, r8, r9,r10,r11,s16~s31,H,r0, r1, r2, r3, r12, LR, PC,xPSR, s0,-s15,fpscr,/0x0/ */

I got something like thishttps://bitbucket.org/AVI-crak/rtos-cortex-m3-gcc/commits/branch/default

look RtoS_cortex_m7.S

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