2010-10-02 05:53 AM
Hi everyone,
I have acquired the discovery board and done a small test, after configuring the ST standard peripheral library for the value line device and 24MHz clock. I toggle the LED pin(PC8) in a infinite while loop and seem to see with the oscilloscope only 81ns for every executed instruction, this is half the speed I was expecting. Am I missing something? The prefetch buffer is not configured in peripherall library for this device, I assume that the internal flash should be fast enough to hold 41.3ns access times. Have I got this wrong somehow? Any suggestions? Thank you! P.S. Code was written in assembler so I don't have any overhead from peripherall library.2010-10-02 09:28 AM
The flash memory is probably in the 30-35 ns region natively (Fujitsu has faster cells, but this is the norm). The prefetch buffering is not need at lower speed, it is there to mitigate the disparity in speed at higher clock rates.
Load and Store are typically not single cycle, and will be limited by the bus to which the transaction occurs. AHB requires one cycle for address and another cycle for data.2010-10-02 09:58 AM
Hi clive1,
Thanks for the reply. What do you mean by this:''AHB requires one cycle for address and another cycle for data.''? You want to say that it needs 2 clock cycles to do an instruction fetch from Flash memory? LE: The problem is that the pin is stays as 1 for 81ns instead of 41 as I would have expected here. The code looks like this in the listing:asm volatile(''movw.w r0, #0'' ''\n\t''
800018e: f240 0000 movw r0, #0 ; 0x0
8000192: f240 0100 movw r1, #0 ; 0x0
8000196: f241 000c movw r0, #4108 ; 0x100c
800019a: f2c4 0101 movt r1, #16385 ; 0x4001
800019e: ea40 0001 orr.w r0, r0, r1
80001a2: f04f 0200 mov.w r2, #0 ; 0x0
80001a6: f44f 7180 mov.w r1, #256 ; 0x100
80001aa: 6001 str r1, [r0, #0]
''mov r2, #0x0000'' ''\n\t''
''mov r1, #0x0100'' ''\n\t''
''str r1, [r0]''); // Turn On the LED
while (1)
{
asm volatile(''str r2, [r0]'' ''\n\t''
80001ac: 6002 str r2, [r0, #0]
80001ae: 6001 str r1, [r0, #0]
80001b0: 6002 str r2, [r0, #0]
80001b2: e7fb b.n 80001ac <main+0x74>
2010-10-02 11:47 AM
The flash memory is tightly coupled, and is not a limiting factor here. The instructions will fetch in a single cycle (ditto RAM and ROM).
The stores for the GPIO's are however a AHB and APB connection AWAY from the CPU.2010-10-02 11:55 AM