FDCAN->CKDIV vs FDCAN_CONFIG->CKDIV

[Uwe Bonnes]

rm0456 describes CKDIV belonging to the FDCAN register structure, However the actual header in the cmsis_device_u5 repo make it a member of the FDCAN_Config_TypeDef. This is missleading!

Probably FDCAN_Config_TypeDef. is some structure found in the MCAN IP. There is no description of FDCAN_Config in the reference manual. A description is welcome,

[Andrew Neil]

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@Uwe Bonnes wrote:

rm0456 describes CKDIV belonging to the FDCAN register structure, However the actual header in the cmsis_device_u5 repo make it a member of the FDCAN_Config_TypeDef. This is missleading!,

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Is it?

The RM calls it "FDCAN CFG Clock Divider" - so FDCAN_Config_TypeDef doesn't seem an unreasonable name?

https://www.st.com/resource/en/reference_manual/rm0456-stm32u5-series-armbased-32bit-mcus-stmicroelectronics.pdf#page=3082

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@Uwe Bonnes wrote:

Probably FDCAN_Config_TypeDef. is some structure found in the MCAN IP. ,

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Use your IDE's 'Go To Definition' feature to find it.

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@Uwe Bonnes wrote:

There is no description of FDCAN_Config in the reference manual. 

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Well, the RM describes the hardware - not the software.

[Uwe Bonnes]

From 70.4.37, it could be expected that FDCAN1 -> CKDIV resolves against the device header. But it does not resolve:

...

#include <stm32u355xx.h>

...

FDCAN1 -> CKDIV = 0xa;

> arm-none_eabi_gcc ...

/devel/stm32u5_fdcan/lv2_splitter_u535/../fdcan.c:378:12: error: 'FDCAN_GlobalTypeDef' has no member named 'CKDIV'
378 | FDCAN1 -> CKDIV = 0xa; //divide by 20
       |                ^~

[mƎALLEm]

Hello,

I didn't find any definition called FDCAN_Config_TypeDef in the HAL.

Referring to the HAL implementation (HAL_FDCAN_Init()/stm32u5xx_hal_fdcan.c), this is what I can see:

  /* Configure Clock divider */
  FDCAN_CONFIG->CKDIV = hfdcan->Init.ClockDivider;