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Ethernet ST lib - Software reset failing

gwennael
Associate II
Posted on February 14, 2010 at 10:02

Ethernet ST lib - Software reset failing

8 REPLIES 8
repzak
Associate II
Posted on May 17, 2011 at 13:40

Hello,

If this is like the normal ST way, don't you miss a init function call after De-init?

Kasper

gwennael
Associate II
Posted on May 17, 2011 at 13:40

Hello,

I have re-checked the source files from ST, the SoftwareReset() immediatly follows deInit() in every example.

This is why I dont get it, code is mainly copypasted from ST samples/doc and I cannot imagine a hardware issue affecting the execution this way...

Posted on May 17, 2011 at 13:40

Make sure you have enabled ALL the clocks you need. Including the AF (Alternate Function) and GPIO_X (GPIO Banks being used).

Try using an unmodified example, verify it works on that.

Examine what the peripheral is doing in the debugger.

-Clive

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gwennael
Associate II
Posted on May 17, 2011 at 13:40

Thanks clive.

I have the following in my RCC_init:

    /* Enable ETHERNET clock  */

    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_ETH_MAC | RCC_AHBPeriph_ETH_MAC_Tx | RCC_AHBPeriph_ETH_MAC_Rx, ENABLE);

    /* Enable GPIOs clocks */

    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA |    RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC |

                         RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE| RCC_APB2Periph_AFIO, ENABLE);

It looks for me that the clocks are well configured!

I am using a modified version only because I am on a custom board with a slightly different layout.

What do you mean by ''what is the peripheral doing''?

Posted on May 17, 2011 at 13:40

''Examine what the peripheral is doing in the debugger''

I can't speak to the F107 part and the Ethernet, but with the F103 in Keil you can examine the peripherals via the ''Peripherals'' menu and look at the bit settings, interupt flags, etc. You should be able to see if the Ethernet unit is alive, and adjust the setting. You can also create a debug monitor on the UART to probe the unit, look at registers, etc and see if settings you put in are sticking, or if bits are toggling as you might expect. Alternatively load registers in to a scratch area of RAM, and view that with the JTAG probe.

If your hardware is different, check that the Alternate Function and Remap settings are appropriate. Check the clocks going to the PHY/MII, or reference clocks coming from the PHY if external clocks are being used.

Check that things work on reference hardware.

-Clive

Tips, buy me a coffee, or three.. PayPal Venmo Up vote any posts that you find helpful, it shows what's working..
jeffj2
Associate II
Posted on May 17, 2011 at 13:40

Hi, you said that is a custom board, right? If be sure not the problem of software, pls check PA1. When PHY work as MII, PA1 is input pin for MII_RX_CLK; if as RMII, you know, PHY need a 50MHz clock, and be sure the clock to feed PA1 pin too. So pls check your PA1's connecting, I guess you have considered that, but check soldering well.

 

 

Jeff J.

 

gilles23
Associate
Posted on May 17, 2011 at 13:40

Hello to all,

Like you Gwenn, I now have the same trouble as you had few months ago.

My software, close to yours (and the evalc FW), blocks in the ''ETH_GetSoftwareResetStatus'' function.

Did the advices from clive1 and Jeff help you ? Did you find out  a solution ?

Thanks in advance,

Gilles.

gilles23
Associate
Posted on May 17, 2011 at 13:40

I found out the problem.

The MAC internal periph in clocked by the PHY device, trought the pinA1 pin, as Jeff said.

So I had to check if a clock signal where connected to my PA1.

As everybody should already know...