2010-08-31 12:51 AM
EOC ADC INTERRUPT
2011-05-17 05:04 AM
Continuousmode off means there is one sampling & conversion. So it enters ISR andthen stops u need to trigger ADC once again by usingADC_SoftwareStartConvCmd(ADC1, ENABLE); .
Continuousmode on it triggers interrupt on each (group) conversion done. Conversions are made in infinite row.Going more deeply according that you are using 72Mhz clock your ADC clock is:
RCC_ADCCLKConfig(RCC_PCLK2_Div8);72Mhz / 8 =9Mhz
totalconversion cycles = 1,5 (ADC_SampleTime_1Cycles5) + 12,5 cycles
totalconversion time = 14 * 1/9Mhz = 1,(5) us
So each1,5us you have new value and EOC flag is set. More or less its very short timeand you need to do all your math in this time otherwise next eoc flag is setand may not enter main loop at all. Let’s mention that interrupt latency is 12cycles.
Do youreally need that frequent short time sampling? I bet you want short timesampling but not that frequent than use that continuous mode for sake of simplicityand additional timer to read values. Don’t use EOC flag.
That is theway I see it i might be wrong just starting with stm32.
2011-05-17 05:04 AM
My only requeriments are the follow:
- ADC Conversion time =1uS- 20KHz conversion frecuency I have the configuration:XTAL=8MHzHCLK=56MHZ RCC_PLLConfig(RCC_PLLSource_HSE_Div1,RCC_PLLMul_7);APB2= 56MHz RCC_PCLK2Config(RCC_HCLK_Div1);ADCCLK=14MHz RCC_ADCCLKConfig(RCC_PCLK2_Div4);1 Regular channel 1.5 cycles ADC_RegularChannelConfig(ADC1, ADC_Channel_15, 1, ADC_SampleTime_1Cycles5);totalconversion time = 14 * 1/14Mhz = 1us
My sysclk is 56MHz so i think that one clock cycle is 17,85nS more or less, so I think that have enough time to leave the ISR2011-05-17 05:04 AM
It's still only 56 cycles but you should be able toquit isr and jump to main loop. Did you set a trap in main loop to check if itsreally not going into there?. Also try increasing conversion time tocheck if its not really I am to slow in ISR problem.
If you want behavior like in diagram above.
1.
Configure ADC to continuousmode off
2.
Start periodic 20kHz timer
3.
On timer update event start manually conversion ADC_RegularChannelConfig(ADC1,ADC_Channel_15, 1, ADC_SampleTime_1Cycles5);
4.
Wait for conversion by using EOC ISR
5.
When done (ISRevent) setup output compare registers to get desired pulses shape.
Regards
Thomas
2011-05-17 05:04 AM
Thks Litom:
I´ve just post the same question in another post hehehe. I will try it and I will tell you. Thks for the help dude2011-05-17 05:04 AM
2011-05-17 05:04 AM
Now I see that beginning is just initial condition.
1.
Configure ADC to continuousmode off
2.
Start periodic 20kHz timer
3.
Setup compare registers to trigger interrupt close to end of timer periodand start adc conversion.
4.
On timer updateevent or EOC read analog value and do whatever you want with this probablysetup another compare register to get desired pulse shape.
Even more easy if you don’t need sampling in exactperiods of time. Run ADC in continuous mode forget about EOC flag and readvalue at the beginning of timer update event.
First scenario is also not time accurate too becauseyou need to fire up conversion. As for timers I know there can be made hardwaresynchronization and I bet ADC is able to be externally triggered read docs ifyou need this kind of accuracy.
Regards
Thomas