DMA request from external input signal

[gilles239955]

Posted on April 16, 2013 at 12:40

I have an input 8 bits parallel bus, with a CLK signal connected to GPIOs. The frequency is 1MHz. I need to configure an automatic DMA transfert from the 8 bits GPIO to a memory buffer (dual buffer mode would be great).

To acheive this, I started to configure a timer to request DMA transferts on each CLK rising edge, with input capture mode. The timer is correctly copying counter in CR1 on rising edge, and DMA is correctly transfering data when I manually initiate a tranfert. But I can't have the timer requesting the DMA transfert.The TIM1 is configured in Input capture mode on TI1 connected to CH1, with CC1E, CC1DE bits and CCS1 = '01', and CEN bit in CR.The DMA2 stream 1 is configured as memory to memory mode (for the tests, I don't use GPIO input, just a buffer copy) : DIR = '10', MINC, PINC, PL = '10', channel 6, NDTR = 4, PAR and M0AR configured with my buufers addresses.Do somebody has a sample source code to do this? I can't find any on google. Is there another solution without timers? #dma #timer

[Tesla DeLorean]

Posted on April 16, 2013 at 12:48

Look at the DCMI interface.

[gilles239955]

Posted on April 29, 2013 at 10:11

Hello

I changed my input from GPIO to DCMI interface. I can now have DMA2 transfering data from the DCMI to a double memory buffer, I receive interrupts on transfert complete, and call fwrite to transfert complete buffers to the SDIO.My new problem is that the 2 DMA streams are done by the DMA2 (DCMI and SDIO are only connected to DMA2), and i have some unknown data corruption when writing to the SDIO. I measured the fwrite duration, it takes around 4ms for a 4KB transfert, but can take up to 400ms!! So during this time DCMI sends interrupts (47ms period for my buffer size), but i can't managed them, and the DMA starts transfering data in the buffer i currently writing to the SDIO.Then I found the STM32F20x errate sheet that mention :  ''DMA2 data corruption when managing AHB and APB peripherals in a concurrent way ''DescriptionWhen the DMA2 is managing AHB Peripherals (only peripherals embedding FIFOs) andalso APB transfers in a concurrent way, this generates a data corruption (multiple DMAaccess).... WorkaroundAvoid concurrent AHB (DCMI, CRYPTO, HASH, FSMC with external FIFO) and APBtransfer management using the DMA2.So... is there a tiny little chance that I could find a solution to properly transfert a 8bits parallel input (with an external CLK, DataValid) to a SD card ?

[Tesla DeLorean]

Posted on April 29, 2013 at 14:24

I would tend to do the SD card handling in the foreground, and have adequate buffering. Several 16KB or 32KB buffers, as available resources dictate.

External DMA is going to be kind of problematic, the STM32 is not well architected for this. A couple of possible methods : Use an external TIMx_TRIG routing, and DMA association. Use an internal TIMx_CHx/UP/TRIG to pace DMA, and clock external source. Use an external FIFO chip or FPGA and connect it to the FSMC bus.