Difference with DMA between F746ZG and F746IG

[Jeremy Durand]

Posted on March 28, 2017 at 15:34

Hi, 

before receving my new board, I develop application on NUCLEO-F746ZG (at 25 MHz). I use a DMA on RX of USART3 (DMA1 Stream 1 Channel 4). All works fine. When I received new board with STM32F746IG (at 8 MHz), the DMA on RX of USART3 doesn't work. My counter never increment. Of course, I adjust parameters of clock. On USART3, I can transmit and receive by interrupt, but I need to use RX by DMA. All other functionnalites of my application work fine.

If I come back on the NUCLEO-F746ZG (by changing clock configuration), the DMA on RX of USART3 works fine...

Someone can help me?

Thanks in advance!

Jeremy D.

I use Keil uVision 5.23, CMSIS 5.0.1, MDK 7.4.0 and DFP 2.9.0.

[waclawek.jan]

Posted on March 28, 2017 at 15:53

DMA status registers shows what?

Don't you use a different memory map, with DMA target in a non-DMA-ble memory area?

JW

[Jeremy Durand]

Posted on March 28, 2017 at 16:09

Thanks for reply.

My DMA buffer is in DTCM memory (0x200000xx) in both case.

The state after initialisation is: HAL_DMA_STATE_BUSY

The state after running is: HAL_DMA_STATE_READY

The state after 'receiving' is: HAL_DMA_STATE_READY

[waclawek.jan]

Posted on March 28, 2017 at 17:44

I mean, content of DMA_LISR/DMA_HISR.

And, when at it, content of the relevant DMA stream registers, too.

And, when at it, content of the relevant USART registers, too.

JW

[waclawek.jan]

Posted on March 28, 2017 at 20:09

> I don't use the same binary, because I need to recompile to the appropriate STM32F7 device (F746ZG on Nucelo vs F746IG on our board). 

Then it's not the same program.

> I already have a breakpoint in DMA1_Stream1_IRQHandler. Interrupt never occurs.

At the very beginning of DMA1_Stream1_IRQHandler? Is this DMA1_Stream1_IRQHandler() pointed to from the vector table?

Try to read out the DMA Stream registers before the interrupt is enabled, or, disable the interrupt/comment out the line which enables it.

JW

[Jeremy Durand]

Posted on March 28, 2017 at 19:08

I use the SAME code between two boards.

On NUCLEO-F746ZG at the initialisation:

    DMA_LISR = 0

    DMA_HISR = 0

   S1CR = 0x0802051F

   S1NDTR = 0x00000010

   S1PAR = 0x40004824

   S1M0AR = 0x2000008C

   S1M1AR = 0

   S1FCR = 0x000000A0

On NUCLEO-F746ZG at the interrupt:

    DMA_LISR = 0x00000400

    DMA_HISR = 0

   S1CR = 0x0801051F

   S1NDTR = 0x00000004 (I sent '*IDN?' )

   S1PAR = 0x40004824

   S1M0AR =

0x20000

08C

   S1M1AR = 0

   S1FCR = 0x000000A0

On the F746IG board at the initialisation:

    DMA_LISR = 0

    DMA_HISR = 0

   S1CR = 0x08020500

   S1NDTR = 0x0000000F

   S1PAR = 0x40004824

   S1M0AR = 0x2000008C

   S1M1AR = 0

   S1FCR = 0x00000020

On the F746IG board at the interrupt:

   Interruption never occurs.

With this exercice, I can see that some enable bits are disabled. Don't forget that I use the same code on two different boards...

Thanks

[waclawek.jan]

Posted on March 28, 2017 at 19:28

 S1NDTR = 0x0000000F

indicates that one transfer already happened. Zero LISR/HISR indicates that *something* already cleared the flags. Most likely the interrupt. I believe you are talking about 'callback never happens' rather than 'interrupt never occurs'. If this is the case, place a breakpoint into the ISR itself.

Don't forget that I use the same code on two different boards...

You mean, the same binary (elf, hex, bin)? Or do you recompile the same sources just with some different settings?

JW

PS. Oh, and, do you use the bootloader, maybe on USART3?

[Jeremy Durand]

Posted on March 28, 2017 at 19:38

I already have a breakpoint in DMA1_Stream1_IRQHandler. Interrupt never occurs.

I don't use the same binary, because I need to recompile to the appropriate STM32F7 device (F746ZG on Nucelo vs F746IG on our board). 

I use bootloader (BOOT0), but it is disable with our dipswitch (pin to ground).

Thanks

[Jeremy Durand]

Posted on March 28, 2017 at 20:19

I run the initialisation and I put breakpoint in IRQ before generate 'interrupt'. I put a break point at the beginning 

DMA1_Stream1_IRQHandler and the breakpoint breaks

.

I disable interrupt and run initialisation. The IRQ doesn't occur. The registers are:

    DMA_LISR = 0x00000800

    DMA_HISR = 0

   S1CR = 0x0802051E

   S1NDTR = 0x00000010

   S1PAR = 0x40004824

   S1M0AR = 0x2000008C

   S1M1AR = 0

   S1FCR = 0x000000A0

[Tesla DeLorean]

Posted on March 28, 2017 at 23:27

Is the baud rate (USART3->BRR) correct for the current clocking? If the main clock source changed make sure HSE_VALUE (or whatever equivalent your library uses) matches. ie the PLL and APB clock setting bits are mapped back and forth with the input clock to determine the bus clock to use for the baud generation.

Wrong baud rate, no reception, no DMA. Test USART in polling mode, or output 'U' chars and scope for bit timing.