2017-01-24 10:28 AM
Hello
It is mentioned in the table 87 (DCMI characteristics, stm32f405/407 datasheet, Rev7) that max DCMI_PIXCLK is 54 MHz, and it's mentioned in the RM0090 that this peripheral is capable of up to 54MBytes/s transfer rate. The question is, how number of data lines affects this throughput rate? is this rate just for 8 data lines (because of that it uses whole of data register)?
Thanks.
2017-01-25 02:35 AM
Hi
tag.aseok
,For the same datasheet table (
DCMI characteristics), it is specified that configuration used 'Data format: 14 bits'.
Referring to RM0090, we have the following:
- 8-bit data: 'to capture a 32-bit word, the camera interface takes four pixel clock cycles.'
- 10/12/14-bit data: ' a 32-bit data word is made up every two pixel clock cycles'
-Amel
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2017-02-09 10:28 PM
Hello, according to that table, 54MHz * (7/4 Bytes) = 94.5 MBytes/s. Is it correct?