Cannot for the life of me get TIM2 to trigger ADC1

[jeremyh]

Posted on April 03, 2012 at 08:00

Hi all,

Bit at my wits end here. I have been trying for quite some time to get ADC1 to trigger on TIM2 CC2. To start with, I tried to use TIM3 TRGO with about the same amount of luck (ie none). Everything works fine if I put ADC->CR2 = ADC_CR2_ADON in the timer interrupt, so that I have at least done something right. The DAC is just in there so I can see the counter value on my oscilloscope. Does anyone have any idea what on earth I am doing wrong? Any help at all would be very much appreciated! I am using an STM32VLDiscovery (STM32F100) with GCC.

#define CPU_SPEED 24000000


#include ''stm32f10x.h''


void
TIM2_IRQHandler(
void
) {

if
(TIM2->SR & TIM_SR_UIF) {

TIM2->SR &= ~TIM_SR_UIF;

}


if
(TIM2->SR & TIM_SR_CC2IF) {

TIM2->SR &= ~TIM_SR_CC2IF;

GPIOC->ODR |= (1<<9);

}

}


void
adc1_init() {

RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; 
// clock on

ADC1->CR1 = ADC_CR1_EOCIE; 
// eoc interrupt, channel 0

ADC1->CR2 = ADC_CR2_EXTTRIG | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0; 
// external trigger, tim2 cc2 trigger

ADC1->CR2 = ADC_CR2_ADON; 
// wake up ADC (needs to be done with its own write)

NVIC->ISER[0] |= (1 << (ADC1_IRQn & 0x1F)); 
// IRQ enable

}


void
ADC1_IRQHandler(
void
) {

if
(ADC1->SR & ADC_SR_EOC) {

ADC1->SR &= ~ADC_SR_EOC;

GPIOB->ODR = ADC1->DR;

}

}


int
main(
void
)

{

int
j = 0;

RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_IOPCEN;


adc1_init();

// configure portc lower to be output

GPIOC->CRL = 0x11111111; 
// all general purpose push-pull output

GPIOC->CRH = 0x11111111;

GPIOC->ODR = 0x00000000;


GPIOB->CRL = 0x11111111;

GPIOB->CRH = 0x11111111; 
// GPIOB too!


// enable tim2 (general purpose timer)

RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;


NVIC->ISER[0] |= (1 << (TIM2_IRQn & 0x1F)); 
// enable position 28 interrupt (TIM2)

TIM2->PSC = 0xFFFF; 
// huge prescaler

TIM2->DIER = TIM_DIER_UIE | TIM_DIER_CC2IE; 
// compare 2 interrupt enable

TIM2->ARR = 0xF; 
// count up to 0xF

TIM2->CCR2 = 0x6; 
// trigger at 0x6

TIM2->CR1 = TIM_CR1_CEN; 
// enable the clock


TIM2->EGR = 1; 
// update the shadow registers


// init dac

RCC->APB2ENR |= RCC_APB2ENR_IOPAEN;

GPIOA->CRL = 0;

RCC->APB1ENR |= RCC_APB1ENR_DACEN;

DAC->CR |= DAC_CR_EN1;


while
(1) {

if
(TIM2->CNT != 0x6) GPIOC->ODR &= ~(1<<9);

DAC->DHR12R1 = TIM2->CNT*256; 
// output the counter value

}

}