Can SPI hardware control hold NSS low for a multiple byte frame?

[kotwal]

Posted on September 13, 2017 at 22:08

I've got a STM32L476 with a SPI port configured as a master, talking to a single slave device. The slave device needs to communicate in 32-bit frames, with the chip select held low for the entire frame. Is there a way to do this with NSS hardware control? From what I've seen, the largest frame size I can set is 16 bits (using the DS bits in SPIx_CR2) and the NSS line toggles in between each frame.

I know I can configure the NSS pin as a GPIO and control it in software, and that works fine, but it would be nice if the hardware could take care of it.

For what it's worth, I'm using HAL drivers with STM32Cube_FW_L4_V1.8.1.

Thanks.

[waclawek.jan · Accepted solution]

Posted on September 13, 2017 at 22:25

No, you can't, not simply by using the 'NSS pulse' facility of the newer SPI modules.

I pull something similar out using a combination of timer and DMA mαgic.

JW

[kotwal]

Posted on September 13, 2017 at 22:49

Ok, that's what I suspected. Thanks for confirming.