Can I use the WWDG to generate an interrupt when the watchdog down-counter register reaches 0x40 (EWI in WWDG_CFR is set), but keep WDGA bit cleared so that a reset is not generated ? From the block diagram, this seems like it would work.

gahelton1 · ‎2022-03-01

TDK · ‎2022-03-01

Yes, you can reload the WWDG in the EWI interrupt to avoid a reset.

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