I'm reading RM0492 Rev 3 about I2C's controller transmitter. The original words on the page of 1185 are
When RELOAD = 0 and the number of data bytes defined in NBYTES[7:0] is transferred:
• In automatic end mode (AUTOEND = 1), a STOP condition is automatically sent.
• In software end mode (AUTOEND = 0), the TC flag is set and the SCL line is stretched
low, to perform software actions:
– A RESTART condition can be requested by setting the START bit of the I2C_CR2
register with the proper target address configuration and the number of bytes to
transfer. Setting the START bit clears the TC flag and sends the START condition
on the bus.
– A STOP condition can be requested by setting the STOP bit of the I2C_CR2
register. This clears the TC flag and sends a STOP condition on the bus.
When a NACK is received, the TXIS flag is not set and a STOP condition is automatically
sent. The NACKF flag of the I2C_ISR register is set. An interrupt is generated if the NACKIE bit is set.
I'm confusing about
When a NACK is received, the TXIS flag is not set and a STOP condition is automatically
sent. The NACKF flag of the I2C_ISR register is set. An interrupt is generated if the NACKIE bit is set.
I'd like to know under what circumstances a stop will be automatically generated when a NACK is received in advance. Is a stop automatically generated only if a NACK is received early when AUTOEND=1?
