Posted on November 03, 2016 at 18:30 Hi,
I'm trying to have 3-wires SPI high speed communication using a Nucleo F746ZG working at 192MHz.
My goal is to have an efficient (no dead time) 3-wire SPI communication.
I'm afraid it is an impossible task.
SPI2 is configured in half duplex mode. Let us start one byte RX using HAL_SPI_receive():
HAL_SPI_Receive(&hspi2, data, 1, 1);
In RX mode, to enable SPI clock the driver setsSPI_1LINE_RX(hspi).
The issue is that to stop SPI clock we need to disable SPI peripheral. Disable time depends on software and we have more SPI clock pulses then expected. The faster is the SPI clock the more extra clock we have.
Alex modified HAL_SPI_RECEIVE anticipating _HAL_SPI_DISABLE(hspi);
Using high SPI clock speed the trick does not work. At 12MHz SPI clock, to read a single byte, we generate 16 clock pulses instead of 8 and at 24MHz we have much more clock pulses and clock remains high level at the end of transfer. (please see pictures)
I tried also DMA:HAL_SPI_Receive_DMA(&hspi2, data, 1)but I have more extra clock pulses than withHAL_SPI_Receive. It means that SPI peripheral is disabled later.
Please, do you have any suggestion or I have to give up?
Than you!
Stefano
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Attachments : 12MHZ.bmp :
https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006Htgm&d=%2Fa%2F0X0000000aVl%2FkpIQz6RNSce0Yt3MJG9zlowz3zfPCPKxwQ_JVkLe6eE&asPdf=false24MHZ.bmp :
https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006Htgw&d=%2Fa%2F0X0000000aVn%2FVSjTggS0TGWE3KzrQRRr5UwVPozHiyz9OxEckJhmhrI&asPdf=false
