Boot Configuration for SRAM

[charlesherrera]

Posted on February 03, 2009 at 04:25

Boot Configuration for SRAM

[charlesherrera]

Posted on May 17, 2011 at 12:59

Hello,

Can someone explain how the SRAM selection for the boot configuration works? I have set the boot configuration to the other two settings, FLASH and SYSTEM Memory, and they work fine. I can see when the FLASH and the system memory (ST boot loader) are aliased to address 0x0. Also when the hardware reset is pressed I run either my application in FLASH or the ST boot loader. When I try the SRAM setting I do not see the aliasing of the internal SRAM to address 0x0 and my application does not run it does not seem to be using my vector table etc. When I look at address 0 in the debugger it seems to force the address 0x20005000 as the boot vector address placed permanently at address 0x0. I have placed my vector table at 0x20000000 and at the 0x20005000. I am running the stm3210E-EVAL board with IAR development tools. I have not found any examples or much documentation on this subject. Regards, Charles Herrera

[16-32micros]

Posted on May 17, 2011 at 12:59

Hi Charles,

You can refer to Section ''2.4 Boot configuration'' in STM32 reference Manual RM0008 version 7 ( December 2008) ( Page 41/679) : it says : The BOOT pins are also re-sampled when exiting from Standby mode. Consequently they must be kept in the required Boot mode configuration in Standby mode. After this start-up delay has elapsed, the CPU fetches the top-of-stack value from address 0x0000 0000, then starts code execution from the boot memory starting from 0x0000 0004. Due to its fixed memory map, the code area starts from address 0x0000 0000 (accessed through the ICode/DCode buses) while the data area (SRAM) starts from address 0x2000 0000 (accessed through the system bus). The Cortex-M3 CPU always fetches the reset vector on the ICode bus, which implies to have the boot space available only in the code area (typically, Flash memory). STM32F10xxx microcontrollers implement a special mechanism to be able to boot also from SRAM and not only from main Flash memory and System memory.Depending on the selected boot mode main Flash memory, System memory or SRAM is accessible as follows: â—� Boot from main Flash memory: the main Flash memory is aliased in the boot memory space (0x0000 0000), but still accessible from its original memory space (0x800 0000). In other words, the Flash memory contents can be accessed starting from address 0x0000 0000 or 0x800 0000. â—� Boot from System memory: the System memory is aliased in the boot memory space (0x0000 0000), but still accessible from its original memory space (0x1FFF F000). â—� Boot from the embedded SRAM: SRAM is accessible only at address 0x2000 0000. Note: When booting from SRAM, in the application initialization code, you have to relocate the vector table in SRAM using the NVIC exception table and offset register.Hope this helps you. Cheers, STOne-32.

[charlesherrera]

Posted on May 17, 2011 at 12:59

Hello,

Thanks for the help, I was looking at a manual from Sept 2008. Regards, Charles Herrera

[marcus2399]

Posted on May 17, 2011 at 12:59

Hi!

I am in the same situation as charlesherrera. I downloaded the new manual and read the boot configuration part quite thoroughly, but I cannot find more information about the ''special mechanism'' that the STM32 microcontrollers implement. If the SRAM only is accessible at 0x20000000, then how can one boot entirely from RAM? After a reset, the CPU follow the reset vector at 0x00000004 which is in FLASH, and the pointer probably points to boot code in FLASH, which is not what you want. Maybe, what you mean by booting from SRAM, is load the code using a debugger (such as OpenOCD) and then explicitly jump to the boot code which remaps the NVIC vector base address to 0x20000000. After that, you're completely running from RAM. Perhaps, this is just an academic question about what is meant by ''booting''... Or is there something I am missing? Best regards, Marcus