Showing results for 
Search instead for 
Did you mean: 

A workaround for the fact that LPTIMx CNT register is read-only and typically do not have a reset

Kent Swan

In many of the STM32 processors having LPTIMx timers the CNT register is read only and there is no explicit reset which will clear the CNT register. The following is an undocumented hack which will accomplish the equivalent of a reset of the CNT register.

// This hack requires that we save the ARR and CMP so we can

// restore them after the CNT clear.

        uint32_t arrRegisterSave =  (&hlptim2)->Instance->ARR;

        uiny32_t cmpRegisterSave =  (&hlptim2)->Instance->CMP;

// Undocumented disable/enable of LPTIMx to clears the CNT register. In testing it

// appears that, except ARR and CMP registers none of other registers of the instance are

// affected.

         (&hlptim2)->Instance->CR  &= ~LPTIM_CR_ENABLE;

         (&hlptim2)->Instance->CR  |= LPTIM_CR_ENABLE;

// Since the ARR and CMP registers were reset so we need to

// restore them.

         (&hlptim2)->Instance->ARR  = arrRegisterSave;

         (&hlptim2)->Instance->CMP  = cmpRegisterSave;