1 external RAM shared between 2 separate FSMCs

dmakhrov9 · ‎2012-10-16

Posted on October 16, 2012 at 17:14

Hi all,

I'd like to make 2 STM32F407 share 1 external RAM as a common memory. Chip #1 would store some data in RAM for chip #2, then stop all accesses and signal to #2 that there is some data for him. Chip #2 would do its job, store result in the same external RAM, abandon it and signal to #1 that it is done.

I see it is not easy to just ''Hi-Z'' FSMC pins, since they would retain their modes as inputs or (even worse) outputs even if FSMC is deinitialized.

Is there any possibility for external RAM sharing then?

regards

Dmitri

P.S. I'd like to avoid too big hardware overhead

frankmeyer9 · ‎2012-10-19

Posted on October 19, 2012 at 13:17

Surely you can write bare-metal code even for a Cortex A15, but somewhere it begins to hurt in complexity, time and costs ...

A multiprocessor solution will probably hurt in this regard, too. It is often underestimated by developers and project leaders who have no actual experience with this.

You can evaluate some higher-performance CPU. So far, I only found the NXP3200 as an approximate match. Or, you could reduce your project in complexity and performance requirements.

dmakhrov9 · ‎2012-10-19

Posted on October 19, 2012 at 15:57

The very fact of the firware residing unprotected in the outter NAND makes me nervous 😉

jj2 · ‎2012-10-19

Posted on October 19, 2012 at 16:20

Do you fear your client or broader market? Unless your product is very much ''sought'' - most tend to ''over-estimate'' the likelihood of unauthorized, ''appropriation.''

There are alternatives -

a) employ the higher power NXP device - as suggested - but also use a ''protected'' MCU such as inexpensive 32F0 which works in concert. You gain performance and present another barrier to your attacker.

b) employ secure, programmable logic - placing yet another barrier.

Sometimes, ''first to market'' - and adequate support, roll-out, and pricing will discourage such attacks...

emalund · ‎2012-10-19

Posted on October 19, 2012 at 17:22

blasted websire

emalund · ‎2012-10-19

Posted on October 19, 2012 at 17:23

blasted websire getting me again declaring error after doing its job

emalund · ‎2012-10-19

Posted on October 19, 2012 at 17:24

The more I think about this, the more multiprocessor solution seem a mess to me.

Not necessarily

if you use a Dual Port RAM (with sentinel if you need it) you will be fine.

Have a look at dual port RAMs at Cypress.

I have made several multiprocessor projects and, for certain apps have huge advantages over multitasking. E.g. with 2 processors, you can have two ISRs tha can not be interrupted, try that with one processor.

Erik

emalund · ‎2012-10-19

Posted on October 19, 2012 at 17:29

The very fact of the firware residing unprotected in the outter NAND makes me nervous 😉

I do not get you. what firmware? using two processors does not imply shared firmware

Erik

jj2 · ‎2012-10-19

Posted on October 19, 2012 at 22:10

Believe he's speaking of the earlier mentioned NXP uC - which stores code externally...

I favor your Cypress RAM suggestion - good to know that you succeeded...