When the basic timer performs interrupt processing, transmission of communication by DMA delays the

[tkjae]

If I generate a 2kHz interrupt process using a basic timer and perform several SPI communications with DMA during that cycle, the generation of the 2kHz interrupt process is delayed by roughly the interrupt time in DMA.
Can you please provide a solution to avoid the delay?

The following excerpted source is included for reference.
■stm32f7xx_it.c
/* 2 kHz cycle task */
void TIM7_IRQHandler(void)
{
/* USER CODE BEGIN TIM7_IRQn 0 */
/* USER CODE END TIM7_IRQn 0 */
HAL_TIM_IRQHandler(&htim7);
/* USER CODE BEGIN TIM7_IRQn 1 */
/* USER CODE BEGIN Callback 1 */
StartCommunication();
/* USER CODE END TIM7_IRQn 1 */
}

void DMA2_Stream4_IRQHandler(void)
{
/* USER CODE BEGIN DMA2_Stream4_IRQn 0 */
/* USER CODE END DMA2_Stream4_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_spi5_tx);
/* USER CODE BEGIN DMA2_Stream4_IRQn 1 */
if(hdma_spi5_tx.State == HAL_DMA_STATE_BUSY || hdma_spi5_rx.State == HAL_DMA_STATE_BUSY){
return;
}
StartCommunication();
/* USER CODE END DMA2_Stream4_IRQn 1 */
}

■main.c
void StartCommunication()
{
static int cnt = 0;
if(cnt >= 5){
cnt = 0;
return;
}
cnt++;

char cmd[4] = {0xff, 0xff, 0xff, 0xff};
char buf[4] = {0xff, 0xff, 0xff, 0xff};
HAL_StatusTypeDef status = HAL_OK;
status = HAL_SPI_TransmitReceive_DMA(&hspi5, cmd, buf, 4);
} 

[waclawek.jan]

Assign the timer interrupt higher priority. You will need to add some interlocking mechanism for the call of the same function - or, better, rethink your application logic as a while. 

Also, don't use local variables as DMA buffers.

JW

[tkjae]

Thank you for your response.

The priority of the interrupt was higher for the timer because the DMA had a higher priority. This fix solved the problem.
But here is my question, a few DMA-SPI communications are about 200μs and should be within 500μs (=2kHz), so why is the problem solved by changing the priority level?
If you know, please let me know.

[waclawek.jan]

I don't know.

Try toggling a GPIO ouput pin at the beginning and at the end of the DMA interrupt and another around the timer interrupt, and observe them on oscilloscope/logic analyzer.

JW