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USB high speed fails to enumarate

Associate II

Hi All!
I'm trying to use USB high speed in STM32h723 with an external phy usb3300.
I started the program from the CubeMx Ux_Device_CDC_ACM which uses the internal phy.
I modified the clocks and the USB module to use an external phy USB3300 and so far it works fine in Full Speed.
My problem is that when I try to use it at High Speed, the enumeration is not going well and the device is not recognised by the PC (win10).

With a USB protocol analyser, I got this when High speed is set: Got stuck in with device configuration
Chirp, passation of data with address setting and device descriptor seems to work


And This is Full Speed: Works fine


With an oscilloscope, I check the 60M clock, and the timing of DIR, NEXT, and STP signals relative to the CLK.
Even though they are not very clean signals there are within the data sheet limitations.
My questions:
1. Anyone with the idea of what I Should do?
2. Where in the program can I look to debug the functions handling the enumeration of the USB?
I have USBX, ThreadX in the project and I francky don't know who is handling who?
I feel that if I can just put a wait after each descriptor or force the program to send each descriptor 3times,

I might pass that stage and get the device recognised by the PC.

Thanks in advance.

ST Employee

Hi @RichFarmer ,

Thank you for the detailed question, if you don’t mind to see the hardware schematics Clock HSE and ULPI I/O used . Before going to software side .

@FBL may help further 



Associate II

Thanks for the quick reaction.
Is the ioc file good enough?
Here are some pictures of the clock.
I'm working with a Nucleo Board H723ZG and for HSE, use the 8MHz from the STLK_MCO.
My constraint with the clock is that I am planning to the FDCAN module with 96MHz from PLL2Q.







Hi @RichFarmer ,

if you are using our Nucleo, I assume using some flying wires to hook the signals to the USB3300 or my understanding is wrong .  I would suggest to run the default examples of High Speed USB keeping the same Clocks configuration before changing them to your requirements.  Also to check how the 60MHz going to the PHY is generated?



Associate II


Yes, I am using some flying wires and am aware that there is a huge chance that my problem is the signal impedance or layout. But, isn't anything else I could check before just changing the board and layout?

Even with the default example and clock configuration (just change the USB_OTG_HS module to use external HS phy), I am facing the same problem.
The setup starts. Chirp is recognised as HS. The device sends its descriptor and receives an address from the host. The device then resends its descriptor using now the address attributed by the host. The device tries to send its configuration but doesn't get any ack or nack and the setup fails here.

So far, the data that I can read in the descriptor (PID, VID, etc..)with the protocol analyser looks like my settings. So, since the data is "partially" correctly recognised, I would like to go through the setup... 
If anyone could direct me to the function or part of the program handling the communication or setup of the device, it would be helpful.

PS:If it may help: a picture of the protocol analyser result and the data in the descriptor(device)






The HSE signal is from the HSI of the st-link chip and will not be sufficiently accurate for USB purposes. You need a clock source from a crystal.

Probably not going to get it to work with jumper wires, regardless.

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Associate II

I started designing a proper board with a crystal and the correct impedance for the signals.
Meanwhile, I would like to know the function in the program handling the setup.
I am using x cube azrtos-h7 in the program but can't trace back the function. 
I would like to check if I don't have a software problem in the coming board.
Thanks for any tips.

ST Employee

Hello @RichFarmer 

Sorry for not reaching out sooner. About your last question, at device descriptor level, you can get device framework for high speed within you can get the length and  string_framework




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