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USB DFU not visible without ST-LINK connected

tom239955_st
Associate II
Posted on April 10, 2017 at 14:24

I am using STM32F303CCT6 on my own board. During testing I noticed that USB DFU works fine and is detected by the PC, but ONLY when the ST-LINK/V2 is also connected ... When it is not connected the DFU does not show up on my PC?

I performed a sanity check and my code runs as expected without the ST-LINK/V2 connected, its just that the USB DFU is not found be the PC without it ...

Any suggestions or things to check?

Regards.

T

#dfu #usb #stm32f3
14 REPLIES 14
shingadaddy
Senior
Posted on April 10, 2017 at 16:51

Just FLYING by here....Not fmiliar with this exact part.

You are doing WHAT with BOOT0 pin at powerup-bootup-restart of your device? At Vdd (3.3v?)  before any of that I assume? Might feed the machine here a little more details and get more responses. Gotta GO!...

tom239955_st
Associate II
Posted on April 10, 2017 at 17:55

USB is connected, BOOT0 is pulled high (+3V3), the device is reset. With ST-LINK connected the PC sees the DFU, without the ST-LINK connected then the PC does not see any USB device attached.

shingadaddy
Senior
Posted on April 10, 2017 at 18:21

Sounds like the STLINK is supplying the 5VDC that your device detects for Vbus detect.

Self powered / bus powered?

Using Vbus detect?

I know ST varies the methods around on some stm32 parts regarding Vbus detect, pull up resistors being built in or not and such. No recognition at all usually means no pull up on D+ or D-. If your part has the pull ups internally it usually applies them when it detects VBUS (+5VDC on PA9 maybe) or if bus powered, that can be handled by your device just recognizing powering up at all.

tom239955_st
Associate II
Posted on April 10, 2017 at 19:08

Some useful pointers. I am struggling to find a consistent hardware refererence design for the USB. Any suggestions of docs and/or links? If it were a USB hardware circuit problem do you think having the ST-LINK would solve this and allow it to work - it really is a strange one.

The ST-LINK is connected to VCC which in my case is +3V3.

Regards,

Tom
tom239955_st
Associate II
Posted on April 10, 2017 at 21:27

The ST-LINK (external) has its buffers powered by the Target (VTref), and provides power via Pin 19 (3.3V). Back feeding of current might preclude odd reset/startup states.

What is 'VTref'?

The STM32 should threshold the supply on VDDA, and drive the reset.

What do you mean threshold the supply?

I'd want a 10 or 15K pull-up on NRST.

I do not have NRST pin on the MCU connected to anything other than a 100nF capacitor! I have connected the NRST pin (15) on the ST-LINK to the 'sys_njtrst' on the MCU.

BOOT0 normally pulled low via a 10K, shorted to VDD for System Loader boot.

Is this not the other way around?

tom239955_st
Associate II
Posted on April 10, 2017 at 22:15

No, you'd normally want BOOT0 low so it runs YOUR code, don't leave the pin float.

My mistake, this is what I have.

So, you would recommend pulling the MCU NRST pin high - note :-)

Now, am I correct in connecting the ST-LINK NRST to NJTRST? or is that to be connected to MCU NRST?

Posted on April 10, 2017 at 21:15

The ST-LINK (external) has its buffers powered by the Target (VTref), and provides power via Pin 19 (3.3V). Back feeding of current might preclude odd reset/startup states.

What it does with the NRST pin might of more interest. The STM32 should threshold the supply on VDDA, and drive the reset. I'd want a 10 or 15K pull-up on NRST.

http://www.st.com/content/ccc/resource/technical/document/user_manual/65/e0/44/72/9e/34/41/8d/DM00026748.pdf/files/DM00026748.pdf/jcr:content/translations/en.DM00026748.pdf

 

Try wiring the JTAG using individual jumper wires, and make a determination about which pin is causing headaches.

I've seen very simple designs go into DFU mode via USB. One 5V to 3.3V regulator going into VDD, and VDDA. BOOT0 normally pulled low via a 10K, shorted to VDD for System Loader boot.

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Posted on April 10, 2017 at 22:03

Voltage Target Reference, what you're system runs at 2.7V, 1.8V whatever

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0517b/Cjaeccji.html

 

Power-On Reset circuit watchs for a transitional voltage, in external circuits often a laser-trimmed part, holding a 3.0V system clamped in reset until the voltage ramps above 2.7V. Ensures a proper/effective reset of synchronous logic which might start being semi-functional at 1.2V

Like I said 'I'd put a pull-up on my designs', consider it as constructive suggestion.

NRST != NJTRST, one is the MCU reset the other is a JTAG system reset.

No, you'd normally want BOOT0 low so it runs YOUR code, don't leave the pin float. When you want the System Loader to work the pin must by High, test fixturing of a normal board, with it pulled low, simply drives/connects to VDD/VCC to get it into that mode. If you use a button, button shorts to VDD, otherwise normally pulled low.

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Posted on April 10, 2017 at 22:21

NRST goes to NRST (NRESET), the CPU

NJTRST goes to NJTRST, honestly not required for SWD connectivity.

0690X00000606irQAA.png

For SWD, you want VCC, GND, SWCLK, SWDIO, SWO, NRST

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