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USB comms induced ADC noise: reasonable expectation?

m8r-j47xv3
Associate II
Posted on July 05, 2014 at 17:17

Hello,

I am working on a data acquisition board that sends an ADC value to a host PC over USB. The system suffers from a large amount of noise in the ADC readings. This noise exists also on the internal ADC reference.

- Only USB and ADC functions are enabled, no other peripherals or MCU function.

- 4 layer board, 2 unbroken inner ground planes

- decoupling very near CPU power pins: 4x 47 nF, 3x 4.7nF C0G

- stm32 package does not export ADC REF+ or REF-. AVDD filtered via 47 uH inductor (resonance 1 MHz) + 47 nF.

- CPU core clock is 72 MHz, reduce to 48 MHz makes no difference.

- noise only visible (on oscilloscope) during active USB comms. Noise 'blips' on VDD precisely synchronised with USB data frames (1 ms). With USB not active, noise is approx. 5 mVp-p.

- External power supply for AVDD makes no difference.

My question is, is it reasonable to expect at least 10 bit accuracy with simultaneous USB comms? Or should I just use an external ADC if I plan on using USB?

#usb #adc #noise
4 REPLIES 4
m8r-j47xv3
Associate II
Posted on July 05, 2014 at 18:47

Improved the AVDD filter to a series 100 Ohm resistor, followed by the inductor damped with a 1k5 resistor, followed by 47 nF and 470 nF MLCC capacitor.

Results:

Using nop in the main loop: 4 mV noise on VDD

Using WFI in the main loop: 14 mV noise on VDD

During USB streaming (nop in main loop): 8 mV noise on VDD

In all cases, noise on AVDD was 2 mV.

Bit noise almost unchanged: lowest 4~5 bits are noise for

- internal ref,

- external 2.5k voltage divider from 3v3,

- external buffered 1.65V voltage.

For 2 mV noise on AVDD, I would expect 2 mV / 3.3/2^12 = less than 3 bits noise.

os_kopernika
Associate II
Posted on July 05, 2014 at 21:59

''stm32 package does not export ADC REF+ or REF-.''

You meant: ''Low pin count packages do not export AREF pins''

''With USB not active, noise is approx. 5 mVp-p.''

May I assume this is where 99.8% of samples fall into? And the AREF is 3.3V? 12-bit, 1Msps?

In such case V(X) = sqrt(4096*5mV/(6*3.3)) [bits] = 1.07 bits

http://www.avrfreaks.net/index.php?name=PNphpBB2&file=viewtopic&p=1167954#1167954

I didn't test anything but ADC and indeed even toggling IOs jams ADC.

I suggest you could filter out data or synchronize it to fit in between USB frames (I know, a bit crazy).

I would like to hear about the ADC performance of STM32 with AREF pins..

Tamas Novak
Associate III
Posted on July 06, 2014 at 16:59

As I always measure slow signals (temperature, power voltage etc.) I use software average filtering: having the last 10-100 values in a circular buffer, overwrite the oldest when reading a new A/D value, and average the whole measurement value array. At startup the buffer has to be filled with max elements, if you don't want the average to float up from zero.

I know it is not usable for a fast data aquisition board: (

m8r-j47xv3
Associate II
Posted on July 06, 2014 at 17:30

Instead of the STM32 internal ADC, I used an ADS7822 12-bit SAR ADC from Burr-Brown. Ratsnested on the same board with filtering as described in my previous posts. Performance is excellent, < 1.5 bit noise.

I conclude that in practice it is not possible to use the STM32 internal ADC at its advertised resolution, at least in packages where VREF+ and VREF- are inaccessible.