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STM32H563ZI + APS6404L QSPI Memory Mapped Reads Failing

theAE
Visitor

Hello, 

I am using a STM32H563ZI with an external PSRAM QSPI device, the APS6404L. I am using Quad-SPI through the OCTOSPI interface and have been successfully able to get into memory mapped mode. However, every time I go to read, I read out only 0 data. Has anyone ran into this same issue? I have pasted my code for transitioning the device to memory mapped mode and a subsequent test write/read. Thanks! 

 

int main(void)
{

  /* USER CODE BEGIN 1 */
  /* USER CODE END 1 */

  /* MCU Configuration--------------------------------------------------------*/

  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
  HAL_Init();

  /* USER CODE BEGIN Init */

  /* USER CODE END Init */

  /* Configure the system clock */
  SystemClock_Config();

  /* USER CODE BEGIN SysInit */

  /* USER CODE END SysInit */

  /* Initialize all configured peripherals */
  MX_GPIO_Init();
  MX_ICACHE_Init();
  MX_OCTOSPI1_Init();
  /* USER CODE BEGIN 2 */

  /* USER CODE END 2 */

  /* Infinite loop */
  /* USER CODE BEGIN WHILE */

    /* USER CODE END WHILE */

    /* USER CODE BEGIN 3 */

  HAL_Delay(100);
	uint8_t reset_enable[1] = {0x66}; 
	uint8_t rst[1] = {}; 
	uint8_t buff[3]; 
	uint8_t buffer[128], dato;
	
	APS6404_RESET_ENABLE(&hospi1);	

	PSRAM_ReadID(&hospi1); 
	
	APS6404_ENTER_QUAD_MODE(&hospi1);
		
	uint8_t myData[] = {0xD, 0xE, 0xA, 0xD};
	APS6404L_QuadWrite(&hospi1, OCTOSPI1_BASE, myData, sizeof(myData));
	
	uint8_t rxData[32]; 
	APS6404L_QuadRead(&hospi1, OCTOSPI1_BASE, rxData, sizeof(rxData));
	
	/* MEM MAPPED MODE */
	
	XSPI_RegularCmdTypeDef sCommand;
  XSPI_MemoryMappedTypeDef sMemMappedCfg;
	
  sCommand.OperationType      = HAL_XSPI_OPTYPE_WRITE_CFG;
  sCommand.Instruction        = 0x38;
  sCommand.InstructionMode    = HAL_XSPI_INSTRUCTION_4_LINES;
  sCommand.InstructionWidth   = HAL_XSPI_INSTRUCTION_8_BITS;
  sCommand.InstructionDTRMode = HAL_XSPI_INSTRUCTION_DTR_DISABLE;

  sCommand.Address            = 0x00000000;
  sCommand.AddressMode        = HAL_XSPI_ADDRESS_4_LINES;
  sCommand.AddressWidth       = HAL_XSPI_ADDRESS_24_BITS;
  sCommand.AddressDTRMode     = HAL_XSPI_ADDRESS_DTR_DISABLE;

  sCommand.AlternateBytesMode = HAL_XSPI_ALT_BYTES_NONE;

  sCommand.DataMode           = HAL_XSPI_DATA_4_LINES;
  sCommand.DataDTRMode        = HAL_XSPI_DATA_DTR_DISABLE;

  sCommand.DummyCycles        = 0; // for reads only 
  sCommand.DQSMode            = HAL_XSPI_DQS_ENABLE;
  sCommand.SIOOMode           = HAL_XSPI_SIOO_INST_EVERY_CMD;
	
	sCommand.OperationType      = HAL_XSPI_OPTYPE_WRITE_CFG;
  sCommand.Instruction        = 0x38;
	sCommand.DummyCycles = 6;
	
	if (HAL_XSPI_Command(&hospi1, &sCommand, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
	{
			Error_Handler();
	}
	
	sCommand.OperationType = HAL_XSPI_OPTYPE_READ_CFG;
	sCommand.Instruction = 0xEB;
	sCommand.DummyCycles = 0;
	sCommand.DQSMode = HAL_XSPI_DQS_DISABLE; 
	
	if (HAL_XSPI_Command(&hospi1, &sCommand, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
	{
			Error_Handler();
	}
	
	/* Enable Memory Mapped Mode */
	sMemMappedCfg.TimeOutActivation = HAL_XSPI_TIMEOUT_COUNTER_DISABLE;
	//sMemMappedCfg.TimeoutPeriodClock = 0x34;

		if (HAL_XSPI_MemoryMapped(&hospi1, &sMemMappedCfg))
		{
			Error_Handler();
		}
		
  /* Insert delay 100 ms */
  HAL_Delay(100);
		
  volatile __IO uint8_t *mem_addr_byte;

  // Writing Sequence (8-bit, unaligned pattern)
  mem_addr_byte = (uint8_t *)(OCTOSPI1_BASE);
	
	mem_addr_byte[0] = 0xDE; 
	if (mem_addr_byte[0] != 0xDE)
	{
		Error_Handler();
	}

 

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