STM32F769I DSI SingleBuffer example with custom timing

[TB7]

Hello!

I am working to use the STM32F769I + LCD_DSI_VideoMode_SingleBuffer code example with a different timing output. I was able to get both the 720x480 and 720x576 resolution examples working with no issue. I added a 720p resolution and also got that to work. For my application, frame rate isn't important, I'm just trying to get the DSI timing signals to behave correctly. 

I've modified the HDMI_Format, HDMI_DSIPacket, and HDMI_PLLConfig structs to include these resolutions. I am using standard timing resolutions

#if defined(USE_LCD_HDMI)
/**
 * @brief DSI timming used for different HDMI resolution (720x480 and 720x576)
 */
HDMI_FormatTypeDef HDMI_Format[5] =
{
/* HA HS HB HF VA VS VB VF ASPECT BPP */
{720, 62, 60, 30, 480, 6, 19, 9, HDMI_ASPECT_RATIO_4_3, LCD_DSI_PIXEL_DATA_FMT_RBG888},
{720, 64, 68, 12, 576, 5, 39, 5, HDMI_ASPECT_RATIO_16_9, LCD_DSI_PIXEL_DATA_FMT_RBG888},
{1280, 40, 220, 110, 720, 5, 20, 5, HDMI_ASPECT_RATIO_16_9, LCD_DSI_PIXEL_DATA_FMT_RBG888},
{1920, 44, 148, 88, 1080, 5, 36, 4, HDMI_ASPECT_RATIO_16_9, LCD_DSI_PIXEL_DATA_FMT_RBG888},
};

/**
 * @brief DSI packet size used for different HDMI resolution (720x480 and 720x576)
 */
HDMI_DSIPacketTypeDef HDMI_DSIPacket[5] =
{
/* NP NC VP */
{0, 1, 720},
{0, 1, 720},
{0, 1, 1280},
{0, 1, 1920},
};

/**
 * @brief LTDC PLL settings used for different HDMI resolution (720x480 and 720x576)
 */
HDMI_PLLConfigTypeDef HDMI_PLLConfig[5] =
{
/* N DIV Pclk IDF NDIV ODF LBClk TXEscapeCkdiv*/
{325, 6, 27083, DSI_PLL_IN_DIV5, 65, DSI_PLL_OUT_DIV1, 40625, 3},
{325, 6, 27083, DSI_PLL_IN_DIV5, 65, DSI_PLL_OUT_DIV1, 40625, 3},
{250, 3, 41666, DSI_PLL_IN_DIV5, 100, DSI_PLL_OUT_DIV1, 62500, 4}, // maximum pclk
{250, 3, 41666, DSI_PLL_IN_DIV5, 100, DSI_PLL_OUT_DIV1, 62500, 4}, // maximum pclk
};

I also created a basic checkerboard pattern algorithm to use for confirmation of my signals. The top 3 configurations work with my monitor, including the custom one added in green. However, the 1080p resolution doesn't seem to work.

I've been looking through the documentation but I assume I'm running into some timing limitation, just can't seem to figure out where. I also confirmed something is happening looking at the physical signals (see attached pictures).

In the first picture, you can see the signals at the start of frame look different from the signals at the end of frame (just a checkerboard pattern). In the second picture, you can see a little into the frame where the signal actually changes from the incorrect signal to the correct one.

I've also tried dropping the frame rate to relieve timing and that doesn't seem to help.

Am I missing some additional programming needed to enable these custom resolutions?

Thanks!

[MOEZBEJ]

Hello @TB7 ,

When configuring 1080p resolution on the STM32F769I Discovery board using LTDC and DSI, it's critical to address various factors that can impact display performance. you can first ensure that the timing parameters for the 1080p resolution are correct, the horizontal and vertical sync (HS, VS), back porch (HB, VB), front porch (HF, VF), and active width and height (HA, VA) must match the requirements of the display and the HDMI standard for 1080p.Then check the PLL configuration by verifying  PLL settings in HDMI_PLLConfig are suitable for 1080p .

NB : you may need to adjust the PLL parameters to achieve the required pixel clock while staying within the hardware's capabilities.

BeST regards

MB