STM32F417IG single ended external clock bypass

[santosh239955]

Posted on October 26, 2014 at 20:01

Hi,

I am looking for some info regarding the external clock bypass conditions for STM32F417IG. There was not sufficient info in the datasheet. But, in the reference manual I could find some related data regarding how it can be done. Another problem was the Clock Config tool does not support the external clock bypass conditions. So, that was a problem in generating the required related C code to dump. I just wanted to confirm if the following changes in the system_stm32f4xx.h header file would be sufficient to use the chip in bypass conditions by feeding it using an external single ended clock source and have it communicating with the computer with VCP: I set it to pll_source_hse_bypass. and  RCC->CR |= ((uint32_t)(RCC_CR_HSEON | RCC_CR_HSEBYP));   RCC->CR |= ((uint32_t)RCC_CR_HSEON); In the main.c: I have the following config- &sharpdefine HSE_VALUE((uint 32_t)8000000) should I leave it as it is or make any changes to this in main? I request you to please provide any other samples/code/reference design if available about the same conditions. I already tried with the modifications mentioned above and I think I partially bricked one of the device. I am able to program the flash but it is not able to communicate with pc as the VCP is not being detected. I thereby request you to please look into this and provide some solutuon. Thanks, Sa #stm32f417 #stm32f417 #stm32f417 #hse-hsi-pll-rcc #vcp-stm32f4 #rtfm #external-clock #hse-config

[Tesla DeLorean]

Posted on November 06, 2014 at 20:02

The PLL (VCO) should be in the range 192 MHz to 432 MHz. So 600+ MHz would seem to exceed that.

The values for PLL_P are rather limited, 2, 4, 6 and 8 Kumar needs to state with far greater precision exactly what's going into the part and what clocks and setting are used/expected.