Posted on April 29, 2018 at 06:11
Hey everyone,
I have a quick question,
I have the following chip:
http://www.analog.com/media/en/technical-documentation/data-sheets/AD7761.pdf
It provides the following output when daisy chained(as I'll be using it this way)
So two data lines, one data ready and a data clock running at 24 MHz with rise and fall times of 1 ns.
I'm thinking of using two SPI lines coupled to the data lines, coupling the DCLK to both and then generating a chip select using timers, As soon as the drdy goes low, data starts coming out up until all the bits of the sample are out, then the lines go low until the next drdy. I'd like to generate a chip select using timers that envelopes the data from the drdy falling edge up to the point where all the bits are out(prior to the lines going low).
I plan on using a dma (double buffer mode) on each spi line so that I can send the data out to a SD card via 4 bit SDIO while the spi lines fill the second buffer.
Will this be something I can accomplish with an STM32f722ze using HAL?
Thank in advance for any help
#general-purpose-timers #hal-spi #dma-sdmmc