The MCU I use is H533, but I guess the SPI peripheral in other MCUs would be similar.
I'm looking for the recommended way to regularly transmit over SPI "small" data frames (in the sense that one frame fits into the FIFO) that can vary in size. For example, in response to different events I would be updating values of different DACs or shift registers and they all have their own data frame format and size, usually between 16 and 32 bits.
SPI peripheral has TSIZE and DSIZE settings seemingly exactly for that, but they require disabling the SPI peripheral to be changed (for TSIZE it's documented, for DSIZE, it seems not), and it adds latency to transfers.
So far it seems the optimal approach in my case is to as follows. Please bear with me for a moment and let me know if I'm missing something.
1. Keep DSIZE at 8 bits.
2. Keep the SPI enabled and set CSTART once at the beginning.
LL_SPI_Enable(SPIx);
LL_SPI_StartMasterTransfer(SPIx);
3. When transferring, manually fill the FIFO with the data frame (assuming it fully fits there) and then enable the EOT interrupt. I assume this is valid because judging from the manual, LL_SPI_TransmitData... should be immediately clearing TXC, so the interrupt should fire only after the data from the last LL_SPI_Transmit... gets fully clocked out.
LL_SPI_TransmitData8(SPIx, 0x12u);
LL_SPI_TransmitData8(SPIx, 0x34u);
LL_SPI_TransmitData8(SPIx, 0x56u);
...
LL_SPI_EnableIT_EOT(SPIx);
4. In the interrupt handler, disable the EOT interrupt.
LL_SPI_DisableIT_EOT(SPIx);
This way I get 3-4 SPI clocks latency between the first LL_SPI_TransmitData and the start of the clock. Having to enable the SPI peripheral first, makes this ~6 clocks, so changing TSIZE/DSIZE before the transmission isn't worth it, even though they appear to be made for the task (and the way the SPI peripheral manages flags when TSIZE > 0 logically makes sense).
Am I missing anything here?
