My own bootloader for STM32H750, is this possible?

[andre239955_st]

Hi,

We have devellopped our own bootloader for the different families of STM32. This is based in one sector of the flash while it is able to reprogram the other sectors. Now I am working with a STM32H750 but this one has only 1 sector... I might already know the answer but I would like confirmation, can I use my own booloader here?

If not, what means do I have for reprogramming a device with its read protection activated?

Thanks,

André

[andre239955_st]

Hi all,

I have studied the X scure boot. It is a nice and complete solution. If you have at least 2 flash sectors that is, which I don't for the STM32H750.

This leaves me with 2 options:

• copy my own bootloader to RAM before launching
• change to a different device

I'll forward this to our FAE, including the remark for H740/H751 🙂

[Tesla DeLorean]

Have you ever asked yourself why the H7 busing matrix is so massively complex compared to the F7? It is not because the designers were tripping on LSD....

I've got modules from another vendor on my desk with a CM3 clocking at 384 MHz using ARM IP they licensed at least 8 years ago. ATMEL released a 300 MHz CM7 with FPU-D and had it a retail before ST delivered a 216 MHz CM7 with FPU-S to the same store.

[Uwe Bonnes]

Hopefully H741.

[MikeDB]

I don't get your point I'm afraid. The H7 is only a single M7 core. Indeed a multi-core M7 would be a waste of time as there's no MMU on the die. ST chose to make their matrix so complicated because they use more bus bandwidth compared with other vendors, including of course the 64bit memory bus.

[Tesla DeLorean]

My point is you don't know what the H7 is, and getting a CM7 running at 400-500 MHz with current process technology does not require the three-ring circus delivered here.

Read Page 130 VERY carefully, with your mind open...

https://www.st.com/content/ccc/resource/technical/document/reference_manual/group0/c9/a3/76/fa/55/46/45/fa/DM00314099/files/DM00314099.pdf/jcr:content/translations/en.DM00314099.pdf

The Dual-Port Dual-Bank FLASH?

[MikeDB]

It's not in current process technology. It's 40nm 🙂

ST has done all this to get the performance from a cheap technology they can still make at Crolles-2 without FD-SOI wafers, and at TSMC's older (and hence cheaper) fabs.