['F446 documentation] RCC - frequency limit of dedicated SPDIF-Rx output from PLLI2S
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‎2018-01-16 12:11 PM
However, SPDIF-Rx needs at least 135.2 MHz to support 192kHz audio sampling rate.
Can ST please comment?
Thanks,
Jan Waclawek
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STM32F4 Series
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‎2019-01-29 12:14 AM
Hi Imen,
Thanks for the clarification.
This then should be corrected in both the datasheet (3.27 SPDIF-RX Receiver Interface (SPDIFRX)) and RM0390 rev.4 (27.2 SPDIFRX main features and Table 168. Minimum SPDIFRX_CLK frequency versus audio sampling rate, ).
Jan
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‎2019-01-28 6:51 AM
Hello,
We proposed to add a note in the coming release of reference manuals in Section "Clocking strategy" after table "Minimum SPDIFRX_CLK frequency versus audio sampling rate" like this:
“Please check the RCC capabilities in order to verify which sampling rates can be supported.�?
Kind Regards,
Imen.
Thanks
Imen
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‎2019-01-28 7:40 AM
@Imen DAHMEN​ ,
Thanks for the reply.
So, does this mean that the STM32F446 does *not* support 192kHz audio sampling rate on SPDIF-Rx?
JW
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‎2019-01-28 11:48 PM
@Community member​ ,
Yes, I confirm we can't support 192KHz.
Regards,
Imen.
Thanks
Imen
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‎2019-01-29 12:14 AM
Hi Imen,
Thanks for the clarification.
This then should be corrected in both the datasheet (3.27 SPDIF-RX Receiver Interface (SPDIFRX)) and RM0390 rev.4 (27.2 SPDIFRX main features and Table 168. Minimum SPDIFRX_CLK frequency versus audio sampling rate, ).
Jan
